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Extract FPGA code generation to separate repository #2252

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11aee17
Remove FPGA from CI
tbennun Dec 11, 2025
75fde04
Update C++ standard to C++17
tbennun Dec 11, 2025
c551f42
Remove submodules
tbennun Dec 11, 2025
052cc54
Remove FPGA-specific CMake and DaCe configuration
tbennun Dec 11, 2025
2c96ddd
Revert "Update C++ standard to C++17"
tbennun Dec 11, 2025
239799f
Remove runtime, samples, and tests
tbennun Dec 11, 2025
b5b98ff
Skip importing FPGA codegen
tbennun Dec 11, 2025
944993c
Enable extending configuration schemata
tbennun Dec 14, 2025
6d7f990
Merge branch 'main' into fpga-extraction
tbennun Dec 14, 2025
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75 changes: 0 additions & 75 deletions .github/workflows/fpga-ci.yml
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25 changes: 0 additions & 25 deletions .github/workflows/hardware_test.yml
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37 changes: 0 additions & 37 deletions .github/workflows/verilator_compatibility.yml
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6 changes: 0 additions & 6 deletions .gitmodules
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Original file line number Diff line number Diff line change
Expand Up @@ -5,12 +5,6 @@
[submodule "dace/external/moodycamel"]
path = dace/external/moodycamel
url = https://github.com/cameron314/concurrentqueue.git
[submodule "dace/external/hlslib"]
path = dace/external/hlslib
url = https://github.com/definelicht/hlslib.git
[submodule "dace/viewer/webclient"]
path = dace/viewer/webclient
url = https://github.com/spcl/dace-webclient.git
[submodule "dace/external/rtllib"]
path = dace/external/rtllib
url = https://github.com/carljohnsen/rtllib.git
3 changes: 1 addition & 2 deletions README.md
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@@ -1,6 +1,5 @@
[![General Tests](https://github.com/spcl/dace/actions/workflows/general-ci.yml/badge.svg)](https://github.com/spcl/dace/actions/workflows/general-ci.yml)
[![GPU Tests](https://github.com/spcl/dace/actions/workflows/gpu-ci.yml/badge.svg)](https://github.com/spcl/dace/actions/workflows/gpu-ci.yml)
[![FPGA Tests](https://github.com/spcl/dace/actions/workflows/fpga-ci.yml/badge.svg)](https://github.com/spcl/dace/actions/workflows/fpga-ci.yml)
[![Documentation Status](https://readthedocs.org/projects/spcldace/badge/?version=latest)](https://spcldace.readthedocs.io/en/latest/?badge=latest)
[![PyPI version](https://badge.fury.io/py/dace.svg)](https://badge.fury.io/py/dace)
[![codecov](https://codecov.io/gh/spcl/dace/branch/main/graph/badge.svg)](https://codecov.io/gh/spcl/dace)
Expand All @@ -13,7 +12,7 @@ _Decoupling domain science from performance optimization._

DaCe is a [fast](https://nbviewer.org/github/spcl/dace/blob/main/tutorials/benchmarking.ipynb) parallel programming
framework that takes code in Python/NumPy and other programming languages, and maps it to high-performance
**CPU, GPU, and FPGA** programs, which can be optimized to achieve state-of-the-art. Internally, DaCe
**CPU, GPU, and [FPGA](https://github.com/spcl/dace-fpga)** programs, which can be optimized to achieve state-of-the-art. Internally, DaCe
uses the Stateful DataFlow multiGraph (SDFG) *data-centric intermediate
representation*: A transformable, interactive representation of code based on
data movement.
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