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1. grlib-gpl-2020.2-b4254 grlib-gpl-2020.2-b4254 Public

   Adding support for LEON3 - LEON5 - NOELV on terasic DE10 nano and DE0 nano boards

   VHDL 4 1

2. intel_cyclone_v_soc intel_cyclone_v_soc Public

   Collection of examples using the intel Cyclone 5 SOC FPGA. Demonstrated on Terasic DE10-nano board

   VHDL 1

3. neorv32 neorv32 Public

   Forked from stnolting/neorv32

   🖥️ A size-optimized, customizable full-scale 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

   VHDL 1

4. xilinx_zynq xilinx_zynq Public

   Collection of Xilinx ZynQ examples. Examples using PL, PS or both. Demonstrated on a QMTECH ZYNQ 7010 board

   HTML 4

5. aes aes Public

   VHDL design of an AES cryptographic function. Compliant with FIPS 197. Currently supports AES-256. With test benches and demonstration projects.

   VHDL 2

6. z7_nano z7_nano Public

   Microphase Z7-nano FPGA with ZynQ 7020 FPGA experiments

   VHDL 4