Hardware reset pin doesn't work on CH32X033 or CH32X035

[zane-c]

Sorry if this is the wrong repo to be asking this question. I have a few boards with the CH32 chips. My reset circuit works fine for the v003 chips, but doesn't work for the X03x chips. I am wondering if this is an issue with the defaults being set in the Arduino core for these chips or something else completely.

Both appear to have identical reset circuits in the datasheets. But I did find it odd that one is labeled RST and one is NRST. Shouldn't RST be active high?

• Ch32x reset circuit
• CH32v00x reset circuit

My circuits for reference:

• CH32x schematic
• CH32v00x schematic

Sorry again for the noob question. I am not an embedded engineer.

[maxint-rd]

At first look your circuit seems fine. Reset is usually active low indeed. Those NRST/RST labels may cause some confusion.

My one case where RST was not working was when I used the particular pin for something else. I see in your schematic that for the X035, the RST pin uses PC3. Are you sure your sketch doesn't use PC3 for something? Could it be that PC3 is already initialized for something else by the core? Unfortunately I don't have any X035 to test with...

[zane-c]

Thanks @maxint-rd for taking a look and for the suggestion. I can confirm my sketches don't have any handling of the PC3 pin. I will keep poking through the core's code to see if I can find anything that is initializing that to a non-default.

[maxint-rd]

And.. Did you find something?

I finally got a bunch of CH32X033F8P6 (TSSOP20) chips and soldered a couple to breakout boards. I can confirm that for my X033 pin 4 RST doesn't reset the processor either. Using F12 in the Link Utility does successfully reset the processor. I could use pin 4 as output pin PB7.

Once more I reviewed the datasheet. For pin 4 it lists PB7 as main function after reset with default alternate function RST/T1C2N/O2P2/RTS3. Comparing that to the CH32V003 datasheet lists pin 4 having PD7 as main function after reset with default alternate function NRST/T2CH4/OPP1. No help there...
(For completion: the datasheet lists RST at pins 8/PC3, 4/PC3 and 7/PA21 for the X035 QSOP28, TSSOP20, LQFP64M and LQFP48. No RST for the QFN28 and QFN20?)

The reference manual may shed some more light. On page 246 It states for User Option Bytes [4:3] RST_MODE this:

External reset pin RST enable:
00: RST multiplexing enabled;
11: Multiplexing function off, PA21/PC3/PB7 for GPIO function.
Note: For reset pins in different packages, refer to the datasheet for pin descriptions. For example, PA21 can be multiplexed as an external reset pin in 64-pin R8T6 and 48-pin C8T6 packages.

Reading those option bytes with the Link Utility gave these values:

Adress	Bit [31:24]	[23:16]	[15:8]	[7:0]
0x1FFFF800	nUSER: E0	USER: 1F	nRDPR: 5A	RDPR: A5
0x1FFFF804	nData1: FF	Data1: 00	nData0: FF	Data0: 00
0x1FFFF808	nWRPR1: 00	WRPR1: FF	nWRPR0: 00	WRPR0: FF
0x1FFFF80C	nWRPR3: 00	WRPR3: FF	nWRPR2: 00	WRPR2: FF

RDPR value 0xE0 is binary 1110 0000, showing value 00b for RST_MODE bits [4:3]. This should mean RST multiplexing enabled. However, we both see that while multiplexing might be enabled, the pin doesn't work as /RST. No help still...
Edit: USER value 0x1F is binary 0001 1111, showing value 11b for RST_MODE bits [4:3]. This means RST multiplexing function off, Pin is used for GPIO. Changing value from 0x1F to 0x07 should enable hardware reset. After changing the setting to "Enable RST mul-func" in Link Utility and using the Execute button with Program on, the USER value is set to 0xE7. After that (and some fumbling around in the Link Utility) I needed to power cycle, but now I have a working reset pin!
Changing it back to "Disable mul-func, RST is used for IO function" also worked, but the USER value now became 0xFF instead of the original 0x1F.

FYI: The V003 reference manual shows the same option byte, with these reset modes:

PD7 multiplexed as external pin reset.
00: Ignoring pin states within 128us after turning on the multiplexing function.
01: Ignoring pin states within 1ms after turning on the multiplexing function.
10: Ignoring pin states within 12ms after turning on the multiplexing function.
11: Multiplexing function off, PD7 for I/O function.

At the moment my best assumption is that the core code triggers multiplexing. redefining the pin to be used as a GPIO pin. I imagine the behavior to be similar to initializing Serial on the V003 SOP8; which disables the SWIO pin for programming. (Still need to look a bit deeper...)
Edit: it was a configuration option. See above.

BTW. Stefan Wagner made a CH32X033 development board. It has a reset button that ties PB7 to GND with a 100n capacitor parallel to the button. Nothing special as a circuit I believe.

In short: I didn't find anything... Still looking and hoping for some clues...
Edit: misread the byte order of Link Utility output. Default value after reset is 0xA5 for RDPR according datasheet. See above. Conclusion: The RST function was disabled on my chip by configuration and the Link Utility allows you to enable it...

[maxint-rd]

@zane-c - Got hardware reset pin working as reset on my CH32X033F8P6. See previous post...

[zane-c]

Thanks @maxint-rd for solving this one. I finally had some time to revisit this and you made it easy for me :)

So I guess disabled RST is the default for this chip so this technically is WAI; I'll close this issue.

Would have been nice if this was mentioned in the datasheet but I guess I should have looked closer at the configuration options in the link utility.

Anyway, thanks again!