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[wip] Add integer narrowing pass to the water backend pipeline #638

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[wip] Add integer narrowing pass to the water backend pipeline #638

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42cae58
add int-narrow pass
Hardcode84 Dec 24, 2025
388a47c
update test
Hardcode84 Dec 24, 2025
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13 changes: 7 additions & 6 deletions tests/kernel/wave_gemm_mxfp_test.py
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Original file line number Diff line number Diff line change
Expand Up @@ -397,9 +397,9 @@ def testScaledBatchedGemmMXFP4Codegen(use_water_backend: bool, tmp_path: Path):
# We encode the exact registers and wait counts as we want to know if
# they suddenly change due to backend or upstream MLIR changes.
if use_water_backend:
vgpr_count = 160
vgpr_count = 150
vgpr_spill_count = 0
sgpr_count = 59
sgpr_count = 58
sgpr_spill_count = 0
waitcounts = [
"s_waitcnt lgkmcnt(0)",
Expand All @@ -413,10 +413,11 @@ def testScaledBatchedGemmMXFP4Codegen(use_water_backend: bool, tmp_path: Path):
"s_waitcnt lgkmcnt(1)",
"s_waitcnt vmcnt(0) lgkmcnt(0)",
"s_waitcnt vmcnt(0)",
"s_waitcnt lgkmcnt(7)",
"s_waitcnt lgkmcnt(6)",
"s_waitcnt lgkmcnt(5)",
"s_waitcnt lgkmcnt(4)",
"s_waitcnt lgkmcnt(10)",
"s_waitcnt lgkmcnt(11)",
"s_waitcnt lgkmcnt(2)",
"s_waitcnt lgkmcnt(1)",
"s_waitcnt lgkmcnt(2)",
"s_waitcnt lgkmcnt(3)",
"s_waitcnt lgkmcnt(1)",
"s_waitcnt lgkmcnt(0)",
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1 change: 1 addition & 0 deletions water/tools/water-opt/water-opt.cpp
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Expand Up @@ -48,6 +48,7 @@ void registerWaterTestDialect(DialectRegistry &registry);
} // namespace mlir::water::test

int main(int argc, char **argv) {
mlir::arith::registerArithIntRangeNarrowingPass();
mlir::arith::registerArithIntRangeOptsPass();
mlir::registerCSEPass();
mlir::registerCanonicalizerPass();
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1 change: 1 addition & 0 deletions wave_lang/kernel/wave/water.py
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Expand Up @@ -460,6 +460,7 @@ def add_transform(transform: str, entry_point: str) -> tuple[str, dict[str, Any]
*add_opt(canonicalize_cse),
*add_opt("loop-invariant-code-motion"),
*add_opt("int-range-optimizations"),
*add_opt(("arith-int-range-narrowing", {"int-bitwidths-supported": "8,16,32"})),
"convert-scf-to-cf",
("convert-amdgpu-to-rocdl", {"chipset": target_chip}),
("water-alloc-to-alloca", {}, "gpu.module"),
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