[SYCL][FPGA] Remove deprecation message for intel::disable_loop_pipelining attribute

[smanna12]

#6254 added the fpga_pipeline attribute and
deprecated the intel::disable_loop_pipelining attribute.
While this was in the pipeline, the internal decision was made to switch to properties
rather than attributes for this type of thing.

At this point, internal request is that (at a minimum) the deprecation message for
intel::disable_loop_pipelining be removed, as we no longer plan to deprecate it.
Optionally the intel::fpga_pipeline attribute can be removed from the frontend as well.

Signed-off-by: Soumi Manna [email protected]

[smanna12]

Failures are not related to my PR:

https://github.com/intel/llvm/runs/7214257852?check_suite_focus=true

---

Failed Tests (1):
SYCL :: Basic/stream/release_resources_test.cpp

https://github.com/intel/llvm/runs/7214258579?check_suite_focus=true

---

Failed Tests (1):
SYCL :: Assert/assert_in_simultaneously_multiple_tus.cpp

[premanandrao]

Optionally the intel::fpga_pipeline attribute can be removed from the frontend as well.

I am assuming this will be done in a later patch?

[smanna12]

Optionally the intel::fpga_pipeline attribute can be removed from the frontend as well.

I am assuming this will be done in a later patch?

Yes, this will be done in a later patch.

[smanna12]

Failure is not related to this PR:
https://github.com/intel/llvm/runs/7221701309?check_suite_focus=true
Failed Tests (1):
SYCL :: Assert/assert_in_simultaneously_multiple_tus_one_ndebug.cpp

[smanna12]

Thank you @premanandrao and @mendell27 for reviews.

[smanna12]

@intel/llvm-gatekeepers, this PR is ready to be merged. Thank you