TriCore: mapping CSFRs to RAM space, to fix MTCR/MFCR instructions #8813
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…n. applying proposed CSFR fix from NationalSecurityAgency#1640
ryanmkurtz
added
Feature: Processor/Tricore
Status: Triage
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Hello!
After using Ghidra on TriCore for a while now, I think it is time for me to start contributing. I tried to fix the long mtcr/mfcr problem. See relevant PR & issue:
I basically did what @GhidorahRex suggested in the old PR and finished the CSFR moving and mapping from Sleigh to processor spec. I did this on both TC1x and TC2x (and TC36x, but that will be a different PR).
(I also commented out the mffr/mtfr instructions, since they are only mentioned in the 1.6 ISA's footnotes, however it is not listed as an official instruction, so I don't think they are implemented.)