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PIC24: Use a different pattern for OV/N handling on signed compare #8778

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PIC24: Use a different pattern for OV/N handling on signed compare #8778

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6 changes: 3 additions & 3 deletions Ghidra/Processors/PIC/data/languages/PIC24.sinc
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Original file line number Diff line number Diff line change
Expand Up @@ -2044,16 +2044,16 @@ define pcodeop bootswap;


cond1: "c" is TOK_CCCC=0x1 { tmpBool:1 = SRL_C; export tmpBool; }
cond1: "ge" is TOK_CCCC=0xD { tmpBool:1 = ((SRL_N && SRL_OV) || (!SRL_N && !SRL_OV)); export tmpBool; }
cond1: "ge" is TOK_CCCC=0xD { tmpBool:1 = SRL_N == SRL_OV; export tmpBool; }
#Note: same as branch C, not supported in disassembly
# cond1: "geu" is TOK_CCCC=0x1 { tmpBool:1 = SRL_C ); export tmpBool; }
cond1: "gt" is TOK_CCCC=0xC
{ tmpBool:1 = ((!SRL_Z && SRL_N && SRL_OV) || (!SRL_Z && !SRL_N && !SRL_OV)); export tmpBool; }
{ tmpBool:1 = (!SRL_Z && (SRL_N == SRL_OV)); export tmpBool; }
cond1: "gtu" is TOK_CCCC=0xE { tmpBool:1 = SRL_C && !SRL_Z; export tmpBool; }
cond1: "le" is TOK_CCCC=0x4
{ tmpBool:1 = (SRL_Z || (SRL_N != SRL_OV)); export tmpBool; }
cond1: "leu" is TOK_CCCC=0x6 { tmpBool:1 = (!SRL_C || SRL_Z); export tmpBool; }
cond1: "lt" is TOK_CCCC=0x5 { tmpBool:1 = ((SRL_N && !SRL_OV) || (!SRL_N && SRL_OV)); export tmpBool; }
cond1: "lt" is TOK_CCCC=0x5 { tmpBool:1 = SRL_N != SRL_OV; export tmpBool; }
cond1: "n" is TOK_CCCC=0x3 { tmpBool:1 = (SRL_N); export tmpBool; }
cond1: "nc" is TOK_CCCC=0x9 { tmpBool:1 = (!SRL_C); export tmpBool; }
cond1: "nn" is TOK_CCCC=0xB { tmpBool:1 = (!SRL_N); export tmpBool; }
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