Skip to content

Conversation

SaiHoCao
Copy link
Collaborator

The required functionality is basically implemented and has passed the tests with fork() and join(). An initial review of the VCD waveform shows no issues. The improvements needed are reflected in the comments marked "TODO", mainly concerning the optimization of readyReg and the state machine. The next step is to resolve these issues by examining the VCD waveform.

@CodingPlatelets
Copy link
Owner

need pass ci

@CodingPlatelets
Copy link
Owner

It seems that the verilator's version is wrong, change it as version: ["4.028", "4.032", "4.034", "4.038", "4.108", "4.200", "4.202", "5.018", "5.020"] to "5.020" and try to fix it.
Attention: Please ensure to pass CI first to ensure the reliability and functionality of dev_chisel.

@SaiHoCao
Copy link
Collaborator Author

keep verilator's version in "4.202" and change gcc version to "gcc11" , pass ci

@CodingPlatelets CodingPlatelets merged commit 02aa1cb into dev_chisel Feb 24, 2025
1 check passed
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

2 participants