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Designing-a-Custom-AXI-Slave-Peripheral
Designing-a-Custom-AXI-Slave-Peripheral PublicA guide to creating custom AXI-lite slave peripherals using the Xilinx Vivado tools
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Designing-a-Custom-AXI-Master-using-BFMs
Designing-a-Custom-AXI-Master-using-BFMs PublicA guide to creating custom AXI4 masters using the Xilinx Vivado tools and Bus Functional Models
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Zynq-Zedboard-Vivado-Workshop
Zynq-Zedboard-Vivado-Workshop PublicZynq Workshop for Beginners
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HLS-Axi-Master-on-Microzed-with-Yocto-Linux-device-driver
HLS-Axi-Master-on-Microzed-with-Yocto-Linux-device-driver PublicCreation of a AXI Master and Yocto device driver for Zynq, using High Level Synthesis (HLS) techniques.
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Zynq-Configuration-Controller
Zynq-Configuration-Controller PublicA configuration controller solution allowing a Zynq device to configure downstream FPGAs
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Zynq-MMU-Caches-Control
Zynq-MMU-Caches-Control PublicA guide to controlling the Zynq Cortex A9 MMU / Caches, and a guide showing how to create custom software libraries in Xilinx SDK.
Repositories
- Designing-a-Custom-AXI-Slave-Peripheral Public
A guide to creating custom AXI-lite slave peripherals using the Xilinx Vivado tools
Architech-Silica/Designing-a-Custom-AXI-Slave-Peripheral’s past year of commit activity - Designing-a-Custom-AXI-Master-using-BFMs Public
A guide to creating custom AXI4 masters using the Xilinx Vivado tools and Bus Functional Models
Architech-Silica/Designing-a-Custom-AXI-Master-using-BFMs’s past year of commit activity - SDSoC-by-simple-examples Public
This is a set of simple C code examples aiming to highlight the basic SDSoC features of automatic hw acceleration of C functions
Architech-Silica/SDSoC-by-simple-examples’s past year of commit activity - Zynq-Configuration-Controller Public
A configuration controller solution allowing a Zynq device to configure downstream FPGAs
Architech-Silica/Zynq-Configuration-Controller’s past year of commit activity - VT100-Terminal-Library-Xilinx-SDK Public
Xilinx SDK Library to simplify the use of VT100 Terminal Escape Codes
Architech-Silica/VT100-Terminal-Library-Xilinx-SDK’s past year of commit activity - HLS-Axi-Master-on-Microzed-with-Yocto-Linux-device-driver Public
Creation of a AXI Master and Yocto device driver for Zynq, using High Level Synthesis (HLS) techniques.
Architech-Silica/HLS-Axi-Master-on-Microzed-with-Yocto-Linux-device-driver’s past year of commit activity - Installing-Vivado-2015.1-Ubuntu-14.04.2-64b Public
How to install Xilinx Vivado 2015.1 under VirtualBox on Ubuntu 14.04.2 (64 bit)
Architech-Silica/Installing-Vivado-2015.1-Ubuntu-14.04.2-64b’s past year of commit activity - Zynq-MMU-Caches-Control Public
A guide to controlling the Zynq Cortex A9 MMU / Caches, and a guide showing how to create custom software libraries in Xilinx SDK.
Architech-Silica/Zynq-MMU-Caches-Control’s past year of commit activity
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