@@ -468,117 +468,122 @@ def _rotate(x, y, angle, mirrored=False):
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else :
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return xr , yr
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- def _add_silk_fab (self , el , x , y , angle , mirrored , populate ):
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- if el .tag == 'hole' :
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- dwg_layer = self .pcbdata ['edges' ]
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- elif el .attrib ['layer' ] in [self .TOP_PLACE_LAYER , self .BOT_PLACE_LAYER ]:
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- dwg_layer = self .pcbdata ['drawings' ]['silkscreen' ]
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- top = el .attrib ['layer' ] == self .TOP_PLACE_LAYER
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- elif el .attrib ['layer' ] in [self .TOP_DOCU_LAYER , self .BOT_DOCU_LAYER ]:
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- if not populate :
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- return
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- dwg_layer = self .pcbdata ['drawings' ]['fabrication' ]
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- top = el .attrib ['layer' ] == self .TOP_DOCU_LAYER
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- else :
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- return
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-
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- dwg = None
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-
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- if el .tag == 'wire' :
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- _dx1 = float (el .attrib ['x1' ])
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- _dx2 = float (el .attrib ['x2' ])
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- _dy1 = - float (el .attrib ['y1' ])
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- _dy2 = - float (el .attrib ['y2' ])
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-
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- dx1 , dy1 = self ._rotate (_dx1 , _dy1 , - angle , mirrored )
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- dx2 , dy2 = self ._rotate (_dx2 , _dy2 , - angle , mirrored )
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-
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- x1 , y1 = x + dx1 , - y + dy1
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- x2 , y2 = x + dx2 , - y + dy2
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-
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- if el .get ('curve' ):
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- dwg = {
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- 'type' : 'arc' ,
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- 'width' : float (el .attrib ['width' ]),
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- 'svgpath' : self ._curve_to_svgpath (el , x , y , angle )
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- }
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- else :
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- dwg = {
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- 'type' : 'segment' ,
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- 'start' : [x1 , y1 ],
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- 'end' : [x2 , y2 ],
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- 'width' : float (el .attrib ['width' ])
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- }
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+ def _process_footprint (self , package , x , y , angle , mirrored , populate ):
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+ for el in package .iter ():
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+ if el .tag in ['wire' , 'rectangle' , 'circle' , 'hole' ,
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+ 'polygonshape' , 'polygon' , 'hole' ]:
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+ if el .tag == 'hole' :
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+ dwg_layer = self .pcbdata ['edges' ]
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+ elif el .attrib ['layer' ] in [self .TOP_PLACE_LAYER ,
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+ self .BOT_PLACE_LAYER ]:
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+ dwg_layer = self .pcbdata ['drawings' ]['silkscreen' ]
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+ top = el .attrib ['layer' ] == self .TOP_PLACE_LAYER
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+ elif el .attrib ['layer' ] in [self .TOP_DOCU_LAYER ,
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+ self .BOT_DOCU_LAYER ]:
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+ if not populate :
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+ return
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+ dwg_layer = self .pcbdata ['drawings' ]['fabrication' ]
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+ top = el .attrib ['layer' ] == self .TOP_DOCU_LAYER
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+ elif el .tag == 'wire' and \
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+ el .attrib ['layer' ] == self .DIMENSION_LAYER :
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+ dwg_layer = self .pcbdata ['edges' ]
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+ top = True
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+ else :
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+ return
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- elif el .tag == 'rectangle' :
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- _dv = self ._rectangle_vertices (el )
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+ dwg = None
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- # Rotate rectangle about component origin based on component angle
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- dv = [self ._rotate (_x , _y , - angle , mirrored ) for (_x , _y ) in _dv ]
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+ if el .tag == 'wire' :
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+ _dx1 = float (el .attrib ['x1' ])
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+ _dx2 = float (el .attrib ['x2' ])
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+ _dy1 = - float (el .attrib ['y1' ])
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+ _dy2 = - float (el .attrib ['y2' ])
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- # Map vertices back to absolute coordinates
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- v = [( x + _x , - y + _y ) for ( _x , _y ) in dv ]
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+ dx1 , dy1 = self . _rotate ( _dx1 , _dy1 , - angle , mirrored )
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+ dx2 , dy2 = self . _rotate ( _dx2 , _dy2 , - angle , mirrored )
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- dwg = {
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- 'type' : 'polygon' ,
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- 'filled' : 1 ,
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- 'pos' : [0 , 0 ],
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- 'polygons' : [v ]
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- }
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+ x1 , y1 = x + dx1 , - y + dy1
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+ x2 , y2 = x + dx2 , - y + dy2
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- elif el .tag in ['circle' , 'hole' ]:
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- _x = float (el .attrib ['x' ])
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- _y = - float (el .attrib ['y' ])
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- dxc , dyc = self ._rotate (_x , _y , - angle , mirrored )
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- xc , yc = x + dxc , - y + dyc
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+ if el .get ('curve' ):
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+ dwg = {
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+ 'type' : 'arc' ,
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+ 'width' : float (el .attrib ['width' ]),
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+ 'svgpath' : self ._curve_to_svgpath (el , x , y , angle )
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+ }
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+ else :
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+ dwg = {
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+ 'type' : 'segment' ,
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+ 'start' : [x1 , y1 ],
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+ 'end' : [x2 , y2 ],
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+ 'width' : float (el .attrib ['width' ])
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+ }
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+
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+ elif el .tag == 'rectangle' :
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+ _dv = self ._rectangle_vertices (el )
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+
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+ # Rotate rectangle about component origin based on component angle
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+ dv = [self ._rotate (_x , _y , - angle , mirrored ) for (_x , _y ) in
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+ _dv ]
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+
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+ # Map vertices back to absolute coordinates
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+ v = [(x + _x , - y + _y ) for (_x , _y ) in dv ]
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+
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+ dwg = {
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+ 'type' : 'polygon' ,
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+ 'filled' : 1 ,
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+ 'pos' : [0 , 0 ],
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+ 'polygons' : [v ]
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+ }
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- if el .tag == 'circle' :
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- radius = float (el .attrib ['radius' ])
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- width = float (el .attrib ['width' ])
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- else :
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- radius = float (el .attrib ['drill' ]) / 2
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- width = 0
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-
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- dwg = {
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- 'type' : 'circle' ,
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- 'start' : [xc , yc ],
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- 'radius' : radius ,
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- 'width' : width
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- }
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+ elif el .tag in ['circle' , 'hole' ]:
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+ _x = float (el .attrib ['x' ])
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+ _y = - float (el .attrib ['y' ])
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+ dxc , dyc = self ._rotate (_x , _y , - angle , mirrored )
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+ xc , yc = x + dxc , - y + dyc
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- elif el .tag in ['polygonshape' , 'polygon' ]:
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- segs = el if el .tag == 'polygon' \
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- else el .find ('polygonoutlinesegments' )
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+ if el .tag == 'circle' :
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+ radius = float (el .attrib ['radius' ])
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+ width = float (el .attrib ['width' ])
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+ else :
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+ radius = float (el .attrib ['drill' ]) / 2
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+ width = 0
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+
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+ dwg = {
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+ 'type' : 'circle' ,
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+ 'start' : [xc , yc ],
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+ 'radius' : radius ,
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+ 'width' : width
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+ }
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- dv = self ._segments_to_polygon (segs , angle , mirrored )
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+ elif el .tag in ['polygonshape' , 'polygon' ]:
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+ segs = el if el .tag == 'polygon' \
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+ else el .find ('polygonoutlinesegments' )
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- polygon = [[ x + v [ 0 ], - y + v [ 1 ]] for v in dv ]
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+ dv = self . _segments_to_polygon ( segs , angle , mirrored )
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- dwg = {
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- 'type' : 'polygon' ,
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- 'filled' : 1 ,
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- 'pos' : [0 , 0 ],
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- 'polygons' : [polygon ]
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- }
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+ polygon = [[x + v [0 ], - y + v [1 ]] for v in dv ]
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- if dwg is not None :
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- if el .tag == 'hole' :
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- dwg_layer .append (dwg )
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- else :
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- bot = not top
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+ dwg = {
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+ 'type' : 'polygon' ,
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+ 'filled' : 1 ,
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+ 'pos' : [0 , 0 ],
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+ 'polygons' : [polygon ]
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+ }
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- # Note that in Eagle terminology, 'mirrored' essentially means
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- # 'flipped' (i.e. to the opposite side of the board)
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- if ( mirrored and bot ) or ( not mirrored and top ) :
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- dwg_layer [ 'F' ] .append (dwg )
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- elif ( mirrored and top ) or ( not mirrored and bot ) :
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- dwg_layer [ 'B' ]. append ( dwg )
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+ if dwg is not None :
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+ if el . tag == 'hole' or \
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+ el . attrib [ 'layer' ] == self . DIMENSION_LAYER :
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+ dwg_layer .append (dwg )
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+ else :
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+ bot = not top
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- def _process_footprint (self , package , x , y , angle , mirrored , populate ):
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- for el in package .iter ():
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- if el .tag in ['wire' , 'rectangle' , 'circle' , 'hole' ,
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- 'polygonshape' , 'polygon' , 'hole' ]:
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- self ._add_silk_fab (el , x , y , angle , mirrored , populate )
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+ # Note that in Eagle terminology, 'mirrored' essentially means
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+ # 'flipped' (i.e. to the opposite side of the board)
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+ if (mirrored and bot ) or (not mirrored and top ):
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+ dwg_layer ['F' ].append (dwg )
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+ elif (mirrored and top ) or (not mirrored and bot ):
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+ dwg_layer ['B' ].append (dwg )
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def _element_refdes_to_silk (self , el ):
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for attr in el .iter ('attribute' ):
@@ -731,17 +736,6 @@ def _parse(self, brdfile):
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self .logger .error ("Unsupported units %s on rlMinViaOuter" ,
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mv_units )
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- # Edges & silkscreen (partial)
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- for el in plain .iter ():
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- self ._add_drawing (el )
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- # identify board bounding box based on edges
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- board_outline_bbox = BoundingBox ()
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-
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- for drawing in self .pcbdata ['edges' ]:
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- self .add_drawing_bounding_box (drawing , board_outline_bbox )
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- if board_outline_bbox .initialized ():
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- self .pcbdata ['edges_bbox' ] = board_outline_bbox .to_dict ()
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-
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# Signals --> nets
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if self .config .include_nets :
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self .pcbdata ['nets' ] = []
@@ -762,7 +756,7 @@ def _parse(self, brdfile):
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for poly in signal .iter ('polygon' ):
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self ._add_zone (poly , signal .attrib ['name' ])
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- # Elements --> components, footprints, silkscreen
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+ # Elements --> components, footprints, silkscreen, edges
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for el in elements .iter ('element' ):
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populate = el .get ('populate' ) != 'no'
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elr = self .Rot (el .get ('rot' ))
@@ -825,14 +819,25 @@ def _parse(self, brdfile):
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elr .mirrored )
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self .pcbdata ['footprints' ].append (footprint )
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- # Add silkscreen for component footprint & refdes
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+ # Add silkscreen, edges for component footprint & refdes
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self ._process_footprint (package , elx , ely , elr .angle , elr .mirrored ,
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populate )
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self ._element_refdes_to_silk (el )
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if populate :
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self .components .append (comp )
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+ # Edges & silkscreen (independent of elements)
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+ for el in plain .iter ():
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+ self ._add_drawing (el )
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+ # identify board bounding box based on edges
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+ board_outline_bbox = BoundingBox ()
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+
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+ for drawing in self .pcbdata ['edges' ]:
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+ self .add_drawing_bounding_box (drawing , board_outline_bbox )
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+ if board_outline_bbox .initialized ():
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+ self .pcbdata ['edges_bbox' ] = board_outline_bbox .to_dict ()
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+
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self ._add_parsed_font_data ()
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# Fabrication & metadata
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