From d788a48888feab3af80066ec594b8045bf7cd7fe Mon Sep 17 00:00:00 2001 From: Michael Maitland Date: Tue, 10 Dec 2024 09:12:31 -0800 Subject: [PATCH 1/6] [RISCV][VLOPT] Add support for vop_vi style instructions in vl-opt-op-info.mir --- .../test/CodeGen/RISCV/rvv/vl-opt-op-info.mir | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir b/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir index 5f23823d10103..cabe5e78a8bc0 100644 --- a/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir +++ b/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir @@ -1,6 +1,36 @@ # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5 # RUN: llc %s -o - -mtriple=riscv64 -mattr=+v -run-pass=riscv-vl-optimizer -verify-machineinstrs | FileCheck %s +--- +name: vop_vi +body: | + bb.0: + ; CHECK-LABEL: name: vop_vi + ; CHECK: %x:vr = PseudoVADD_VI_M1 $noreg, $noreg, 9, 1, 3 /* e8 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vr = PseudoVADD_VI_M1 $noreg, %x, 9, 1, 3 /* e8 */, 0 /* tu, mu */ + %x:vr = PseudoVADD_VI_M1 $noreg, $noreg, 9, -1, 3 /* e8 */, 0 + %y:vr = PseudoVADD_VI_M1 $noreg, %x, 9, 1, 3 /* e8 */, 0 +... +--- +name: vop_vi_incompatible_eew +body: | + bb.0: + ; CHECK-LABEL: name: vop_vi_incompatible_eew + ; CHECK: %x:vr = PseudoVADD_VI_M1 $noreg, $noreg, 9, -1, 3 /* e8 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vr = PseudoVADD_VI_M1 $noreg, %x, 9, 1, 4 /* e16 */, 0 /* tu, mu */ + %x:vr = PseudoVADD_VI_M1 $noreg, $noreg, 9, -1, 3 /* e8 */, 0 + %y:vr = PseudoVADD_VI_M1 $noreg, %x, 9, 1, 4 /* e16 */, 0 +... +--- +name: vop_vi_incompatible_emul +body: | + bb.0: + ; CHECK-LABEL: name: vop_vi_incompatible_emul + ; CHECK: %x:vr = PseudoVADD_VI_M1 $noreg, $noreg, 9, -1, 3 /* e8 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vr = PseudoVADD_VI_MF2 $noreg, %x, 9, 1, 3 /* e8 */, 0 /* tu, mu */ + %x:vr = PseudoVADD_VI_M1 $noreg, $noreg, 9, -1, 3 /* e8 */, 0 + %y:vr = PseudoVADD_VI_MF2 $noreg, %x, 9, 1, 3 /* e8 */, 0 +... --- name: vop_vv body: | From ffb96b8f117f85ba62e4de9a5e58010930baae22 Mon Sep 17 00:00:00 2001 From: Michael Maitland Date: Tue, 10 Dec 2024 09:37:26 -0800 Subject: [PATCH 2/6] fixup! test vmerge instructions --- .../test/CodeGen/RISCV/rvv/vl-opt-op-info.mir | 96 +++++++++++++++++++ 1 file changed, 96 insertions(+) diff --git a/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir b/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir index cabe5e78a8bc0..edc9c3a863738 100644 --- a/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir +++ b/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir @@ -712,3 +712,99 @@ body: | %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 %y:vr = PseudoVMSEQ_VV_MF2 $noreg, %x, 1, 3 /* e8 */ ... +--- +name: vmerge_vim +body: | + bb.0: + ; CHECK-LABEL: name: vmerge_vim + ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, 1, 3 /* e8 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vrnov0 = PseudoVMERGE_VIM_M1 $noreg, %x, 9, $v0, 1, 3 /* e8 */ + %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 + %y:vrnov0 = PseudoVMERGE_VIM_M1 $noreg, %x, 9, $v0, 1, 3 /* e8 */ +... +--- +name: vmerge_vim_incompatible_eew +body: | + bb.0: + ; CHECK-LABEL: name: vmerge_vim_incompatible_eew + ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 4 /* e16 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vrnov0 = PseudoVMERGE_VIM_M1 $noreg, %x, 9, $v0, 1, 3 /* e8 */ + %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 4 /* e16 */, 0 + %y:vrnov0 = PseudoVMERGE_VIM_M1 $noreg, %x, 9, $v0, 1, 3 /* e8 */ +... +--- +name: vmerge_vim_incompatible_emul +body: | + bb.0: + ; CHECK-LABEL: name: vmerge_vim_incompatible_emul + ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vrnov0 = PseudoVMERGE_VIM_MF2 $noreg, %x, 9, $v0, 1, 3 /* e8 */ + %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 + %y:vrnov0 = PseudoVMERGE_VIM_MF2 $noreg, %x, 9, $v0, 1, 3 /* e8 */ +... +--- +name: vmerge_vxm +body: | + bb.0: + ; CHECK-LABEL: name: vmerge_vxm + ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, 1, 3 /* e8 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:gpr = ADDI $x0, 1 + ; CHECK-NEXT: %z:vrnov0 = PseudoVMERGE_VXM_M1 $noreg, %x, %y, $v0, 1, 3 /* e8 */ + %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 + %y:gpr = ADDI $x0, 1 + %z:vrnov0 = PseudoVMERGE_VXM_M1 $noreg, %x, %y, $v0, 1, 3 /* e8 */ +... +--- +name: vmerge_vxm_incompatible_eew +body: | + bb.0: + ; CHECK-LABEL: name: vmerge_vxm_incompatible_eew + ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 4 /* e16 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:gpr = ADDI $x0, 1 + ; CHECK-NEXT: %z:vrnov0 = PseudoVMERGE_VXM_M1 $noreg, %x, %y, $v0, 1, 3 /* e8 */ + %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 4 /* e16 */, 0 + %y:gpr = ADDI $x0, 1 + %z:vrnov0 = PseudoVMERGE_VXM_M1 $noreg, %x, %y, $v0, 1, 3 /* e8 */ +... +--- +name: vmerge_vxm_incompatible_emul +body: | + bb.0: + ; CHECK-LABEL: name: vmerge_vxm_incompatible_emul + ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:gpr = ADDI $x0, 1 + ; CHECK-NEXT: %z:vrnov0 = PseudoVMERGE_VXM_MF2 $noreg, %x, %y, $v0, 1, 3 /* e8 */ + %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 + %y:gpr = ADDI $x0, 1 + %z:vrnov0 = PseudoVMERGE_VXM_MF2 $noreg, %x, %y, $v0, 1, 3 /* e8 */ +... +--- +name: vmerge_vvm +body: | + bb.0: + ; CHECK-LABEL: name: vmerge_vvm + ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, 1, 3 /* e8 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vrnov0 = PseudoVMERGE_VVM_M1 $noreg, $noreg, %x, $v0, 1, 3 /* e8 */ + %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 + %y:vrnov0 = PseudoVMERGE_VVM_M1 $noreg, $noreg, %x, $v0, 1, 3 /* e8 */ +... +--- +name: vmerge_vvm_incompatible_eew +body: | + bb.0: + ; CHECK-LABEL: name: vmerge_vvm_incompatible_eew + ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 4 /* e16 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vrnov0 = PseudoVMERGE_VVM_M1 $noreg, $noreg, %x, $v0, 1, 3 /* e8 */ + %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 4 /* e16 */, 0 + %y:vrnov0 = PseudoVMERGE_VVM_M1 $noreg, $noreg, %x, $v0, 1, 3 /* e8 */ +... +--- +name: vmerge_vvm_incompatible_emul +body: | + bb.0: + ; CHECK-LABEL: name: vmerge_vvm_incompatible_emul + ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vrnov0 = PseudoVMERGE_VVM_MF2 $noreg, $noreg, %x, $v0, 1, 3 /* e8 */ + %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 + %y:vrnov0 = PseudoVMERGE_VVM_MF2 $noreg, $noreg, %x, $v0, 1, 3 /* e8 */ +... From 113c6677f23b54fea328fed409a610ed0781d12e Mon Sep 17 00:00:00 2001 From: Michael Maitland Date: Tue, 10 Dec 2024 09:45:00 -0800 Subject: [PATCH 3/6] fixup! test vmv.v.* instructions --- .../test/CodeGen/RISCV/rvv/vl-opt-op-info.mir | 96 +++++++++++++++++++ 1 file changed, 96 insertions(+) diff --git a/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir b/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir index edc9c3a863738..619adbc94704b 100644 --- a/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir +++ b/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir @@ -808,3 +808,99 @@ body: | %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 %y:vrnov0 = PseudoVMERGE_VVM_MF2 $noreg, $noreg, %x, $v0, 1, 3 /* e8 */ ... +--- +name: vmv_v_i +body: | + bb.0: + ; CHECK-LABEL: name: vmv_v_i + ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vr = PseudoVMV_V_I_M1 %x, 9, 1, 3 /* e8 */, 0 /* tu, mu */ + %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 + %y:vr = PseudoVMV_V_I_M1 %x, 9, 1, 3 /* e8 */, 0 +... +--- +name: vmv_v_i_incompatible_eew +body: | + bb.0: + ; CHECK-LABEL: name: vmv_v_i_incompatible_eew + ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 4 /* e16 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vr = PseudoVMV_V_I_M1 %x, 9, 1, 4 /* e16 */, 0 /* tu, mu */ + %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 4 /* e16 */, 0 + %y:vr = PseudoVMV_V_I_M1 %x, 9, 1, 4 /* e16 */, 0 +... +--- +name: vmv_v_i_incompatible_emul +body: | + bb.0: + ; CHECK-LABEL: name: vmv_v_i_incompatible_emul + ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vr = PseudoVMV_V_I_MF2 %x, 9, 1, 3 /* e8 */, 0 /* tu, mu */ + %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 + %y:vr = PseudoVMV_V_I_MF2 %x, 9, 1, 3 /* e8 */, 0 +... +--- +name: vmv_v_x +body: | + bb.0: + ; CHECK-LABEL: name: vmv_v_x + ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:gpr = ADDI $x0, 1 + ; CHECK-NEXT: %z:vr = PseudoVMV_V_X_M1 %x, %y, 1, 3 /* e8 */, 0 /* tu, mu */ + %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 + %y:gpr = ADDI $x0, 1 + %z:vr = PseudoVMV_V_X_M1 %x, %y, 1, 3 /* e8 */, 0 +... +--- +name: vmv_v_x_incompatible_eew +body: | + bb.0: + ; CHECK-LABEL: name: vmv_v_x_incompatible_eew + ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 4 /* e16 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:gpr = ADDI $x0, 1 + ; CHECK-NEXT: %z:vr = PseudoVMV_V_X_M1 %x, %y, 1, 4 /* e16 */, 0 /* tu, mu */ + %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 4 /* e16 */, 0 + %y:gpr = ADDI $x0, 1 + %z:vr = PseudoVMV_V_X_M1 %x, %y, 1, 4 /* e16 */, 0 +... +--- +name: vmv_v_x_incompatible_emul +body: | + bb.0: + ; CHECK-LABEL: name: vmv_v_x_incompatible_emul + ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:gpr = ADDI $x0, 1 + ; CHECK-NEXT: %z:vr = PseudoVMV_V_X_MF2 %x, %y, 1, 3 /* e8 */, 0 /* tu, mu */ + %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 + %y:gpr = ADDI $x0, 1 + %z:vr = PseudoVMV_V_X_MF2 %x, %y, 1, 3 /* e8 */, 0 +... +--- +name: vmv_v_v +body: | + bb.0: + ; CHECK-LABEL: name: vmv_v_v + ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, 1, 3 /* e8 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vr = PseudoVMV_V_I_M1 $noreg, %x, 1, 3 /* e8 */, 0 /* tu, mu */ + %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 + %y:vr = PseudoVMV_V_I_M1 $noreg, %x, 1, 3 /* e8 */, 0 +... +--- +name: vmv_v_v_incompatible_eew +body: | + bb.0: + ; CHECK-LABEL: name: vmv_v_v_incompatible_eew + ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 4 /* e16 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vr = PseudoVMV_V_V_M1 %x, $noreg, 1, 4 /* e16 */, 0 /* tu, mu */ + %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 4 /* e16 */, 0 + %y:vr = PseudoVMV_V_V_M1 %x, $noreg, 1, 4 /* e16 */, 0 +... +--- +name: vmv_v_v_incompatible_emul +body: | + bb.0: + ; CHECK-LABEL: name: vmv_v_v_incompatible_emul + ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vr = PseudoVMV_V_V_MF2 %x, $noreg, 1, 3 /* e8 */, 0 /* tu, mu */ + %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 + %y:vr = PseudoVMV_V_V_MF2 %x, $noreg, 1, 3 /* e8 */, 0 +... From 7a3cb3bab373ba69dcffac28cfadf3c7a08fbf74 Mon Sep 17 00:00:00 2001 From: Michael Maitland Date: Tue, 10 Dec 2024 10:02:21 -0800 Subject: [PATCH 4/6] remove redundant tests --- llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll | 66 -------------------- 1 file changed, 66 deletions(-) diff --git a/llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll b/llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll index 35274c25da856..faa41ec61cd12 100644 --- a/llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll +++ b/llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll @@ -2594,71 +2594,6 @@ define @vwsll_vi( %a, %b ret %2 } -; Test getOperandInfo - -define @vmerge_vim( %a, i8 %b, %m, iXLen %vl) { -; NOVLOPT-LABEL: vmerge_vim: -; NOVLOPT: # %bb.0: -; NOVLOPT-NEXT: vsetvli a2, zero, e8, mf8, tu, ma -; NOVLOPT-NEXT: vmv.v.x v8, a0 -; NOVLOPT-NEXT: vsetvli zero, a1, e8, mf8, ta, ma -; NOVLOPT-NEXT: vmerge.vim v8, v8, 2, v0 -; NOVLOPT-NEXT: ret -; -; VLOPT-LABEL: vmerge_vim: -; VLOPT: # %bb.0: -; VLOPT-NEXT: vsetvli zero, a1, e8, mf8, tu, ma -; VLOPT-NEXT: vmv.v.x v8, a0 -; VLOPT-NEXT: vsetvli zero, zero, e8, mf8, ta, ma -; VLOPT-NEXT: vmerge.vim v8, v8, 2, v0 -; VLOPT-NEXT: ret - %2 = call @llvm.riscv.vmv.v.x.nxv1i8( %a, i8 %b, iXLen -1) - %3 = call @llvm.riscv.vmerge.nxv1i8.nxv1i8( undef, %2, i8 2, %m, iXLen %vl) - ret %3 -} - -define @vmerge_vxm( %a, i8 %b, %m, iXLen %vl) { -; NOVLOPT-LABEL: vmerge_vxm: -; NOVLOPT: # %bb.0: -; NOVLOPT-NEXT: vsetvli a2, zero, e8, mf8, tu, ma -; NOVLOPT-NEXT: vmv.v.x v8, a0 -; NOVLOPT-NEXT: vsetvli zero, a1, e8, mf8, ta, ma -; NOVLOPT-NEXT: vmerge.vxm v8, v8, a0, v0 -; NOVLOPT-NEXT: ret -; -; VLOPT-LABEL: vmerge_vxm: -; VLOPT: # %bb.0: -; VLOPT-NEXT: vsetvli zero, a1, e8, mf8, tu, ma -; VLOPT-NEXT: vmv.v.x v8, a0 -; VLOPT-NEXT: vsetvli zero, zero, e8, mf8, ta, ma -; VLOPT-NEXT: vmerge.vxm v8, v8, a0, v0 -; VLOPT-NEXT: ret - %2 = call @llvm.riscv.vmv.v.x.nxv1i8( %a, i8 %b, iXLen -1) - %3 = call @llvm.riscv.vmerge.nxv1i8.nxv1i8( undef, %2, i8 %b, %m, iXLen %vl) - ret %3 -} - -define @vmerge_vvm( %a, i8 %b, %c, %m, iXLen %vl) { -; NOVLOPT-LABEL: vmerge_vvm: -; NOVLOPT: # %bb.0: -; NOVLOPT-NEXT: vsetvli a2, zero, e8, mf8, tu, ma -; NOVLOPT-NEXT: vmv.v.x v8, a0 -; NOVLOPT-NEXT: vsetvli zero, a1, e8, mf8, ta, ma -; NOVLOPT-NEXT: vmerge.vvm v8, v8, v9, v0 -; NOVLOPT-NEXT: ret -; -; VLOPT-LABEL: vmerge_vvm: -; VLOPT: # %bb.0: -; VLOPT-NEXT: vsetvli zero, a1, e8, mf8, tu, ma -; VLOPT-NEXT: vmv.v.x v8, a0 -; VLOPT-NEXT: vsetvli zero, zero, e8, mf8, ta, ma -; VLOPT-NEXT: vmerge.vvm v8, v8, v9, v0 -; VLOPT-NEXT: ret - %2 = call @llvm.riscv.vmv.v.x.nxv1i8( %a, i8 %b, iXLen -1) - %3 = call @llvm.riscv.vmerge.nxv1i8.nxv1i8( undef, %2, %c, %m, iXLen %vl) - ret %3 -} - define @vmand_mm( %a, %b, %c, iXLen %vl) { ; NOVLOPT-LABEL: vmand_mm: ; NOVLOPT: # %bb.0: @@ -2950,4 +2885,3 @@ define @vmsof_m( %a, %c, %3 = call @llvm.riscv.vadd.mask.nxv1i32.nxv1i32( %c, %c, %c, %2, iXLen %vl, iXLen 0) ret %3 } - From 1222a59fb9aff3e666e05028637ec7a523af0715 Mon Sep 17 00:00:00 2001 From: Michael Maitland Date: Tue, 10 Dec 2024 13:04:11 -0800 Subject: [PATCH 5/6] fixup! respond to review --- llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir b/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir index 619adbc94704b..ee1ab55f62b3e 100644 --- a/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir +++ b/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir @@ -880,19 +880,19 @@ body: | bb.0: ; CHECK-LABEL: name: vmv_v_v ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, 1, 3 /* e8 */, 0 /* tu, mu */ - ; CHECK-NEXT: %y:vr = PseudoVMV_V_I_M1 $noreg, %x, 1, 3 /* e8 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vr = PseudoVMV_V_V_M1 $noreg, %x, 1, 3 /* e8 */, 0 /* tu, mu */ %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 - %y:vr = PseudoVMV_V_I_M1 $noreg, %x, 1, 3 /* e8 */, 0 + %y:vr = PseudoVMV_V_V_M1 $noreg, %x, 1, 3 /* e8 */, 0 ... --- name: vmv_v_v_incompatible_eew body: | bb.0: ; CHECK-LABEL: name: vmv_v_v_incompatible_eew - ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 4 /* e16 */, 0 /* tu, mu */ - ; CHECK-NEXT: %y:vr = PseudoVMV_V_V_M1 %x, $noreg, 1, 4 /* e16 */, 0 /* tu, mu */ + ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, 1, 4 /* e16 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vr = PseudoVMV_V_V_M1 $noreg, %x, 1, 4 /* e16 */, 0 /* tu, mu */ %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 4 /* e16 */, 0 - %y:vr = PseudoVMV_V_V_M1 %x, $noreg, 1, 4 /* e16 */, 0 + %y:vr = PseudoVMV_V_V_M1 $noreg, %x, 1, 4 /* e16 */, 0 ... --- name: vmv_v_v_incompatible_emul @@ -900,7 +900,7 @@ body: | bb.0: ; CHECK-LABEL: name: vmv_v_v_incompatible_emul ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 /* tu, mu */ - ; CHECK-NEXT: %y:vr = PseudoVMV_V_V_MF2 %x, $noreg, 1, 3 /* e8 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vr = PseudoVMV_V_V_MF2 $noreg, %x, 1, 3 /* e8 */, 0 /* tu, mu */ %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 - %y:vr = PseudoVMV_V_V_MF2 %x, $noreg, 1, 3 /* e8 */, 0 + %y:vr = PseudoVMV_V_V_MF2 $noreg, %x, 1, 3 /* e8 */, 0 ... From a4827db9d1d652cdf876353e1e0043457040b4a0 Mon Sep 17 00:00:00 2001 From: Michael Maitland Date: Wed, 11 Dec 2024 07:36:54 -0800 Subject: [PATCH 6/6] fixup! respond to review --- .../test/CodeGen/RISCV/rvv/vl-opt-op-info.mir | 58 ++++++++----------- 1 file changed, 23 insertions(+), 35 deletions(-) diff --git a/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir b/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir index ee1ab55f62b3e..8587ec136afd8 100644 --- a/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir +++ b/llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir @@ -7,9 +7,9 @@ body: | bb.0: ; CHECK-LABEL: name: vop_vi ; CHECK: %x:vr = PseudoVADD_VI_M1 $noreg, $noreg, 9, 1, 3 /* e8 */, 0 /* tu, mu */ - ; CHECK-NEXT: %y:vr = PseudoVADD_VI_M1 $noreg, %x, 9, 1, 3 /* e8 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vr = PseudoVADD_VV_M1 $noreg, %x, $noreg, 1, 3 /* e8 */, 0 /* tu, mu */ %x:vr = PseudoVADD_VI_M1 $noreg, $noreg, 9, -1, 3 /* e8 */, 0 - %y:vr = PseudoVADD_VI_M1 $noreg, %x, 9, 1, 3 /* e8 */, 0 + %y:vr = PseudoVADD_VV_M1 $noreg, %x, $noreg, 1, 3 /* e8 */, 0 ... --- name: vop_vi_incompatible_eew @@ -17,9 +17,9 @@ body: | bb.0: ; CHECK-LABEL: name: vop_vi_incompatible_eew ; CHECK: %x:vr = PseudoVADD_VI_M1 $noreg, $noreg, 9, -1, 3 /* e8 */, 0 /* tu, mu */ - ; CHECK-NEXT: %y:vr = PseudoVADD_VI_M1 $noreg, %x, 9, 1, 4 /* e16 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vr = PseudoVADD_VV_M1 $noreg, %x, $noreg, 1, 4 /* e16 */, 0 /* tu, mu */ %x:vr = PseudoVADD_VI_M1 $noreg, $noreg, 9, -1, 3 /* e8 */, 0 - %y:vr = PseudoVADD_VI_M1 $noreg, %x, 9, 1, 4 /* e16 */, 0 + %y:vr = PseudoVADD_VV_M1 $noreg, %x, $noreg, 1, 4 /* e16 */, 0 ... --- name: vop_vi_incompatible_emul @@ -27,9 +27,9 @@ body: | bb.0: ; CHECK-LABEL: name: vop_vi_incompatible_emul ; CHECK: %x:vr = PseudoVADD_VI_M1 $noreg, $noreg, 9, -1, 3 /* e8 */, 0 /* tu, mu */ - ; CHECK-NEXT: %y:vr = PseudoVADD_VI_MF2 $noreg, %x, 9, 1, 3 /* e8 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vr = PseudoVADD_VV_MF2 $noreg, %x, $noreg, 1, 3 /* e8 */, 0 /* tu, mu */ %x:vr = PseudoVADD_VI_M1 $noreg, $noreg, 9, -1, 3 /* e8 */, 0 - %y:vr = PseudoVADD_VI_MF2 $noreg, %x, 9, 1, 3 /* e8 */, 0 + %y:vr = PseudoVADD_VV_MF2 $noreg, %x, $noreg, 1, 3 /* e8 */, 0 ... --- name: vop_vv @@ -748,11 +748,9 @@ body: | bb.0: ; CHECK-LABEL: name: vmerge_vxm ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, 1, 3 /* e8 */, 0 /* tu, mu */ - ; CHECK-NEXT: %y:gpr = ADDI $x0, 1 - ; CHECK-NEXT: %z:vrnov0 = PseudoVMERGE_VXM_M1 $noreg, %x, %y, $v0, 1, 3 /* e8 */ + ; CHECK-NEXT: %y:vrnov0 = PseudoVMERGE_VXM_M1 $noreg, %x, $noreg, $v0, 1, 3 /* e8 */ %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 - %y:gpr = ADDI $x0, 1 - %z:vrnov0 = PseudoVMERGE_VXM_M1 $noreg, %x, %y, $v0, 1, 3 /* e8 */ + %y:vrnov0 = PseudoVMERGE_VXM_M1 $noreg, %x, $noreg, $v0, 1, 3 /* e8 */ ... --- name: vmerge_vxm_incompatible_eew @@ -760,11 +758,9 @@ body: | bb.0: ; CHECK-LABEL: name: vmerge_vxm_incompatible_eew ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 4 /* e16 */, 0 /* tu, mu */ - ; CHECK-NEXT: %y:gpr = ADDI $x0, 1 - ; CHECK-NEXT: %z:vrnov0 = PseudoVMERGE_VXM_M1 $noreg, %x, %y, $v0, 1, 3 /* e8 */ + ; CHECK-NEXT: %y:vrnov0 = PseudoVMERGE_VXM_M1 $noreg, %x, $noreg, $v0, 1, 3 /* e8 */ %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 4 /* e16 */, 0 - %y:gpr = ADDI $x0, 1 - %z:vrnov0 = PseudoVMERGE_VXM_M1 $noreg, %x, %y, $v0, 1, 3 /* e8 */ + %y:vrnov0 = PseudoVMERGE_VXM_M1 $noreg, %x, $noreg, $v0, 1, 3 /* e8 */ ... --- name: vmerge_vxm_incompatible_emul @@ -772,11 +768,9 @@ body: | bb.0: ; CHECK-LABEL: name: vmerge_vxm_incompatible_emul ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 /* tu, mu */ - ; CHECK-NEXT: %y:gpr = ADDI $x0, 1 - ; CHECK-NEXT: %z:vrnov0 = PseudoVMERGE_VXM_MF2 $noreg, %x, %y, $v0, 1, 3 /* e8 */ + ; CHECK-NEXT: %y:vrnov0 = PseudoVMERGE_VXM_MF2 $noreg, %x, $noreg, $v0, 1, 3 /* e8 */ %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 - %y:gpr = ADDI $x0, 1 - %z:vrnov0 = PseudoVMERGE_VXM_MF2 $noreg, %x, %y, $v0, 1, 3 /* e8 */ + %y:vrnov0 = PseudoVMERGE_VXM_MF2 $noreg, %x, $noreg, $v0, 1, 3 /* e8 */ ... --- name: vmerge_vvm @@ -824,9 +818,9 @@ body: | bb.0: ; CHECK-LABEL: name: vmv_v_i_incompatible_eew ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 4 /* e16 */, 0 /* tu, mu */ - ; CHECK-NEXT: %y:vr = PseudoVMV_V_I_M1 %x, 9, 1, 4 /* e16 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vr = PseudoVMV_V_I_M1 %x, 9, 1, 3 /* e8 */, 0 /* tu, mu */ %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 4 /* e16 */, 0 - %y:vr = PseudoVMV_V_I_M1 %x, 9, 1, 4 /* e16 */, 0 + %y:vr = PseudoVMV_V_I_M1 %x, 9, 1, 3 /* e8 */, 0 ... --- name: vmv_v_i_incompatible_emul @@ -844,11 +838,9 @@ body: | bb.0: ; CHECK-LABEL: name: vmv_v_x ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 /* tu, mu */ - ; CHECK-NEXT: %y:gpr = ADDI $x0, 1 - ; CHECK-NEXT: %z:vr = PseudoVMV_V_X_M1 %x, %y, 1, 3 /* e8 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vr = PseudoVMV_V_X_M1 %x, $noreg, 1, 3 /* e8 */, 0 /* tu, mu */ %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 - %y:gpr = ADDI $x0, 1 - %z:vr = PseudoVMV_V_X_M1 %x, %y, 1, 3 /* e8 */, 0 + %y:vr = PseudoVMV_V_X_M1 %x, $noreg, 1, 3 /* e8 */, 0 ... --- name: vmv_v_x_incompatible_eew @@ -856,11 +848,9 @@ body: | bb.0: ; CHECK-LABEL: name: vmv_v_x_incompatible_eew ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 4 /* e16 */, 0 /* tu, mu */ - ; CHECK-NEXT: %y:gpr = ADDI $x0, 1 - ; CHECK-NEXT: %z:vr = PseudoVMV_V_X_M1 %x, %y, 1, 4 /* e16 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vr = PseudoVMV_V_X_M1 %x, $noreg, 1, 3 /* e8 */, 0 /* tu, mu */ %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 4 /* e16 */, 0 - %y:gpr = ADDI $x0, 1 - %z:vr = PseudoVMV_V_X_M1 %x, %y, 1, 4 /* e16 */, 0 + %y:vr = PseudoVMV_V_X_M1 %x, $noreg, 1, 3 /* e8 */, 0 ... --- name: vmv_v_x_incompatible_emul @@ -868,11 +858,9 @@ body: | bb.0: ; CHECK-LABEL: name: vmv_v_x_incompatible_emul ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 /* tu, mu */ - ; CHECK-NEXT: %y:gpr = ADDI $x0, 1 - ; CHECK-NEXT: %z:vr = PseudoVMV_V_X_MF2 %x, %y, 1, 3 /* e8 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vr = PseudoVMV_V_X_MF2 %x, $noreg, 1, 3 /* e8 */, 0 /* tu, mu */ %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0 - %y:gpr = ADDI $x0, 1 - %z:vr = PseudoVMV_V_X_MF2 %x, %y, 1, 3 /* e8 */, 0 + %y:vr = PseudoVMV_V_X_MF2 %x, $noreg, 1, 3 /* e8 */, 0 ... --- name: vmv_v_v @@ -889,10 +877,10 @@ name: vmv_v_v_incompatible_eew body: | bb.0: ; CHECK-LABEL: name: vmv_v_v_incompatible_eew - ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, 1, 4 /* e16 */, 0 /* tu, mu */ - ; CHECK-NEXT: %y:vr = PseudoVMV_V_V_M1 $noreg, %x, 1, 4 /* e16 */, 0 /* tu, mu */ + ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 4 /* e16 */, 0 /* tu, mu */ + ; CHECK-NEXT: %y:vr = PseudoVMV_V_V_M1 $noreg, %x, 1, 3 /* e8 */, 0 /* tu, mu */ %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 4 /* e16 */, 0 - %y:vr = PseudoVMV_V_V_M1 $noreg, %x, 1, 4 /* e16 */, 0 + %y:vr = PseudoVMV_V_V_M1 $noreg, %x, 1, 3 /* e8 */, 0 ... --- name: vmv_v_v_incompatible_emul