diff --git a/clang/include/clang/Basic/AttrDocs.td b/clang/include/clang/Basic/AttrDocs.td index 0bc553e3a1acf..3b4ec8453edcc 100644 --- a/clang/include/clang/Basic/AttrDocs.td +++ b/clang/include/clang/Basic/AttrDocs.td @@ -3294,9 +3294,6 @@ function, or in conjunction with ``max_interleaving``, ``speculated_iterations``, ``max_concurrency``, ``initiation_interval``, or ``ivdep``. -The ``[[intel::disable_loop_pipelining]]`` attribute spelling is a deprecated -synonym for ``[[[intel::fpga_pipeline]]`` and will be removed in the future. - .. code-block:: c++ void foo() { diff --git a/clang/lib/Sema/SemaDeclAttr.cpp b/clang/lib/Sema/SemaDeclAttr.cpp index cc1ade1e646b3..780103f324dce 100644 --- a/clang/lib/Sema/SemaDeclAttr.cpp +++ b/clang/lib/Sema/SemaDeclAttr.cpp @@ -364,14 +364,6 @@ void Sema::CheckDeprecatedSYCLAttributeSpelling(const ParsedAttr &A, Diag(A.getLoc(), diag::ext_sycl_2020_attr_spelling) << A; return; } - - // Deprecate [[intel::disable_loop_pipelining]] attribute spelling in favor - // of the SYCL FPGA attribute spelling [[intel::fpga_pipeline]]. - if (A.hasScope() && A.getScopeName()->isStr("intel") && - A.getAttrName()->isStr("disable_loop_pipelining")) { - DiagnoseDeprecatedAttribute(A, "intel", "fpga_pipeline"); - return; - } } /// Check if IdxExpr is a valid parameter index for a function or diff --git a/clang/test/SemaSYCL/intel-fpga-loops.cpp b/clang/test/SemaSYCL/intel-fpga-loops.cpp index d093a0ed5f176..4a14afbcc0697 100644 --- a/clang/test/SemaSYCL/intel-fpga-loops.cpp +++ b/clang/test/SemaSYCL/intel-fpga-loops.cpp @@ -134,6 +134,9 @@ void boo() { void goo() { int a[10]; // no diagnostics are expected + [[intel::disable_loop_pipelining]] for (int i = 0; i != 10; ++i) + a[i] = 0; + // no diagnostics are expected [[intel::fpga_pipeline]] for (int i = 0; i != 10; ++i) a[i] = 0; // no diagnostics are expected @@ -269,6 +272,10 @@ void zoo() { [[intel::max_concurrency(2)]] [[intel::initiation_interval(2)]] for (int i = 0; i != 10; ++i) a[i] = 0; + [[intel::disable_loop_pipelining]] + // expected-error@+1 {{duplicate Intel FPGA loop attribute 'disable_loop_pipelining'}} + [[intel::disable_loop_pipelining]] for (int i = 0; i != 10; ++i) + a[i] = 0; [[intel::fpga_pipeline]] // expected-error@+1 {{duplicate Intel FPGA loop attribute 'fpga_pipeline'}} [[intel::fpga_pipeline]] for (int i = 0; i != 10; ++i) @@ -355,23 +362,52 @@ void zoo() { // Test for Intel FPGA loop attributes compatibility void loop_attrs_compatibility() { int a[10]; + // no diagnostics are expected + [[intel::disable_loop_pipelining]] [[intel::loop_coalesce]] for (int i = 0; i != 10; ++i) + a[i] = 0; + // no diagnostics are expected [[intel::fpga_pipeline]] [[intel::loop_coalesce]] for (int i = 0; i != 10; ++i) a[i] = 0; - // expected-error@+4 {{'max_interleaving' and 'disable_loop_pipelining' attributes are not compatible}} + // expected-error@+2 {{'max_interleaving' and 'disable_loop_pipelining' attributes are not compatible}} // expected-note@+1 {{conflicting attribute is here}} - [[intel::disable_loop_pipelining]] // expected-warning {{attribute 'intel::disable_loop_pipelining' is deprecated}} \ - // expected-note {{did you mean to use 'intel::fpga_pipeline' instead?}} - [[intel::max_interleaving(0)]] for (int i = 0; i != 10; ++i) + [[intel::disable_loop_pipelining]] [[intel::max_interleaving(0)]] for (int i = 0; i != 10; ++i) + a[i] = 0; + // expected-error@+2 {{'max_concurrency' and 'disable_loop_pipelining' attributes are not compatible}} + // expected-note@+1 {{conflicting attribute is here}} + [[intel::disable_loop_pipelining]] [[intel::max_concurrency(0)]] for (int i = 0; i != 10; ++i) + a[i] = 0; + // expected-error@+2 {{'disable_loop_pipelining' and 'speculated_iterations' attributes are not compatible}} + // expected-note@+1 {{conflicting attribute is here}} + [[intel::speculated_iterations(0)]] [[intel::disable_loop_pipelining]] for (int i = 0; i != 10; ++i) a[i] = 0; - // expected-error@+2 {{'fpga_pipeline' and 'speculated_iterations' attributes are not compatible}} // expected-note@+1 {{conflicting attribute is here}} [[intel::speculated_iterations(0)]] [[intel::fpga_pipeline]] for (int i = 0; i != 10; ++i) a[i] = 0; + // expected-error@+2 {{'disable_loop_pipelining' and 'initiation_interval' attributes are not compatible}} + // expected-note@+1 {{conflicting attribute is here}} + [[intel::initiation_interval(10)]] [[intel::disable_loop_pipelining]] for (int i = 0; i != 10; ++i) + a[i] = 0; + // expected-error@+2 {{'ivdep' and 'disable_loop_pipelining' attributes are not compatible}} + // expected-note@+1 {{conflicting attribute is here}} + [[intel::disable_loop_pipelining]] [[intel::ivdep]] for (int i = 0; i != 10; ++i) + a[i] = 0; // expected-error@+2 {{'fpga_pipeline' and 'initiation_interval' attributes are not compatible}} // expected-note@+1 {{conflicting attribute is here}} [[intel::initiation_interval(10)]] [[intel::fpga_pipeline]] for (int i = 0; i != 10; ++i) a[i] = 0; + // no diagnostics are expected + [[intel::disable_loop_pipelining]] [[intel::nofusion]] for (int i = 0; i != 10; ++i) + a[i] = 0; + // no diagnostics are expected + [[intel::disable_loop_pipelining]] [[intel::loop_count_avg(8)]] for (int i = 0; i != 10; ++i) + a[i] = 0; + [[intel::loop_count_min(8)]] for (int i = 0; i != 10; ++i) + a[i] = 0; + [[intel::loop_count_max(8)]] for (int i = 0; i != 10; ++i) + a[i] = 0; + [[intel::loop_count(8)]] for (int i = 0; i != 10; ++i) + a[i] = 0; // no diagnostics are expected [[intel::fpga_pipeline]] [[intel::loop_coalesce]] for (int i = 0; i != 10; ++i) @@ -406,6 +442,10 @@ void loop_attrs_compatibility() { // expected-note@+1 {{conflicting attribute is here}} [[intel::ivdep]] [[intel::fpga_pipeline]] for (int i = 0; i != 10; ++i) a[i] = 0; + + // no diagnostics are expected + [[intel::disable_loop_pipelining]] [[intel::fpga_pipeline]] for (int i = 0; i != 10; ++i) + a[i] = 0; } template