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CochWojciechigcbot
CochWojciech
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Add SPIR-V test suite for OpReadClockKHR instruction
This PR introduces test suite for the OpReadClockKHR SPIR-V instruction, ensuring proper compilation and intrinsic generation across different scenarios.
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‎IGC/ocloc_tests/Builtins/clock_tests/clock_read_device.spvasm

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;=========================== begin_copyright_notice ============================
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;
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; Copyright (C) 2025 Intel Corporation
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;
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; SPDX-License-Identifier: MIT
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;
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;============================ end_copyright_notice =============================
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; REQUIRES: spirv-as, regkeys, pvc-supported
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; RUN: spirv-as --target-env spv1.0 -o %t.spv %s
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; RUN: ocloc compile -spirv_input -file %t.spv -device pvc -options " -igc_opts 'PrintToConsole=1 PrintAfter=BuiltinsConverterFunction'" 2>&1 | FileCheck %s
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; CHECK: @llvm.genx.GenISA.cycleCounter()
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; Test: OpReadClockKHR with device scope generates GenISA.cycleCounter intrinsic
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OpCapability Addresses
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OpCapability Linkage
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OpCapability Kernel
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OpCapability Int64
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OpCapability ShaderClockKHR
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OpExtension "SPV_KHR_shader_clock"
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OpMemoryModel Physical64 OpenCL
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OpEntryPoint Kernel %clock_sub_group "clock_read_sub_group"
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OpDecorate %buf Alignment 4
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%ulong = OpTypeInt 64 0
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%uint = OpTypeInt 32 0
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%uint_0 = OpConstant %uint 0
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%uint_1 = OpConstant %uint 1
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%ulong_1 = OpConstant %ulong 1
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%ulong_2 = OpConstant %ulong 2
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%ulong_3 = OpConstant %ulong 3
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%scope_device = OpConstant %uint 1
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%void = OpTypeVoid
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%_ptr_CrossWorkgroup_uint = OpTypePointer CrossWorkgroup %uint
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%functype = OpTypeFunction %void %_ptr_CrossWorkgroup_uint
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%bool = OpTypeBool
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%clock_sub_group = OpFunction %void None %functype
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%buf = OpFunctionParameter %_ptr_CrossWorkgroup_uint
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%funcstart = OpLabel
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%buf_1 = OpInBoundsPtrAccessChain %_ptr_CrossWorkgroup_uint %buf %ulong_1
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%buf_2 = OpInBoundsPtrAccessChain %_ptr_CrossWorkgroup_uint %buf %ulong_2
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%buf_3 = OpInBoundsPtrAccessChain %_ptr_CrossWorkgroup_uint %buf %ulong_3
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%start = OpReadClockKHR %ulong %scope_device
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OpBranch %looptop
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%looptop = OpLabel
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%i = OpPhi %uint %uint_0 %funcstart %next_i %looptop
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%data0 = OpLoad %uint %buf Volatile|Aligned 4
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%data1 = OpLoad %uint %buf_1 Volatile|Aligned 4
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%sum = OpIAdd %uint %data0 %data1
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OpStore %buf %sum Volatile|Aligned 4
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%next_i = OpIAdd %uint %i %uint_1
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%data2 = OpLoad %uint %buf_2 Volatile|Aligned 4
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%looptest = OpULessThan %bool %next_i %data2
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OpBranchConditional %looptest %looptop %loopend
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%loopend = OpLabel
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%end = OpReadClockKHR %ulong %scope_device
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%test = OpULessThan %bool %end %start
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OpBranchConditional %test %funcend %writepass
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%writepass = OpLabel
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OpStore %buf_3 %uint_1 Volatile|Aligned 4
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OpBranch %funcend
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%funcend = OpLabel
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OpReturn
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OpFunctionEnd

‎IGC/ocloc_tests/Builtins/clock_tests/clock_read_dg2.spvasm

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;=========================== begin_copyright_notice ============================
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;
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; Copyright (C) 2025 Intel Corporation
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;
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; SPDX-License-Identifier: MIT
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;
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;============================ end_copyright_notice =============================
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; REQUIRES: spirv-as, regkeys
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; RUN: spirv-as --target-env spv1.0 -o %t.spv %s
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; RUN: ocloc compile -spirv_input -file %t.spv -device dg2 -options " -igc_opts 'PrintToConsole=1 PrintAfter=BuiltinsConverterFunction'" 2>&1 | FileCheck %s
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; CHECK: @llvm.genx.GenISA.cycleCounter()
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; Test case for ReadClockKHR on DG2 device (different from PVC)
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OpCapability Addresses
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OpCapability Linkage
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OpCapability Kernel
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OpCapability Int64
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OpCapability ShaderClockKHR
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OpExtension "SPV_KHR_shader_clock"
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OpMemoryModel Physical64 OpenCL
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OpEntryPoint Kernel %clock_dg2_test "clock_read_dg2_test"
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OpDecorate %buf Alignment 4
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%ulong = OpTypeInt 64 0
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%uint = OpTypeInt 32 0
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%uint2 = OpTypeVector %uint 2
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%uint_0 = OpConstant %uint 0
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%uint_1 = OpConstant %uint 1
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%ulong_1 = OpConstant %ulong 1
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%ulong_2 = OpConstant %ulong 2
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%ulong_3 = OpConstant %ulong 3
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%scope_device = OpConstant %uint 1
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%void = OpTypeVoid
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%_ptr_CrossWorkgroup_uint = OpTypePointer CrossWorkgroup %uint
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%functype = OpTypeFunction %void %_ptr_CrossWorkgroup_uint
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%clock_dg2_test = OpFunction %void None %functype
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%buf = OpFunctionParameter %_ptr_CrossWorkgroup_uint
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%funcstart = OpLabel
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%buf_1 = OpInBoundsPtrAccessChain %_ptr_CrossWorkgroup_uint %buf %ulong_1
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%buf_2 = OpInBoundsPtrAccessChain %_ptr_CrossWorkgroup_uint %buf %ulong_2
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%buf_3 = OpInBoundsPtrAccessChain %_ptr_CrossWorkgroup_uint %buf %ulong_3
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; Test both variants on DG2
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%clock_ulong = OpReadClockKHR %ulong %scope_device
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%clock_uint2 = OpReadClockKHR %uint2 %scope_device
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%ulong_part = OpUConvert %uint %clock_ulong
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%uint2_x = OpCompositeExtract %uint %clock_uint2 0
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%uint2_y = OpCompositeExtract %uint %clock_uint2 1
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OpStore %buf %ulong_part Volatile|Aligned 4
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OpStore %buf_1 %uint2_x Volatile|Aligned 4
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OpStore %buf_2 %uint2_y Volatile|Aligned 4
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OpStore %buf_3 %uint_1 Volatile|Aligned 4
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OpReturn
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OpFunctionEnd

‎IGC/ocloc_tests/Builtins/clock_tests/clock_read_scopes.spvasm

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;=========================== begin_copyright_notice ============================
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;
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; Copyright (C) 2025 Intel Corporation
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;
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; SPDX-License-Identifier: MIT
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;
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;============================ end_copyright_notice =============================
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; REQUIRES: spirv-as, regkeys, pvc-supported
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; RUN: spirv-as --target-env spv1.0 -o %t.spv %s
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; RUN: ocloc compile -spirv_input -file %t.spv -device pvc -options " -igc_opts 'PrintToConsole=1 PrintAfter=BuiltinsConverterFunction'" 2>&1 | FileCheck %s
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; CHECK: @llvm.genx.GenISA.cycleCounter()
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; Test case for ReadClockKHR with different scopes (subgroup, device, workgroup)
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OpCapability Addresses
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OpCapability Linkage
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OpCapability Kernel
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OpCapability Int64
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OpCapability ShaderClockKHR
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OpExtension "SPV_KHR_shader_clock"
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OpMemoryModel Physical64 OpenCL
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OpEntryPoint Kernel %clock_scopes_test "clock_read_scopes_test"
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OpDecorate %buf Alignment 4
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%ulong = OpTypeInt 64 0
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%uint = OpTypeInt 32 0
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%uint_0 = OpConstant %uint 0
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%uint_1 = OpConstant %uint 1
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%uint_2 = OpConstant %uint 2
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%uint_3 = OpConstant %uint 3
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%ulong_1 = OpConstant %ulong 1
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%ulong_2 = OpConstant %ulong 2
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%ulong_3 = OpConstant %ulong 3
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%scope_subgroup = OpConstant %uint 3
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%scope_workgroup = OpConstant %uint 2
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%scope_device = OpConstant %uint 1
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%void = OpTypeVoid
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%_ptr_CrossWorkgroup_uint = OpTypePointer CrossWorkgroup %uint
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%functype = OpTypeFunction %void %_ptr_CrossWorkgroup_uint
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%clock_scopes_test = OpFunction %void None %functype
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%buf = OpFunctionParameter %_ptr_CrossWorkgroup_uint
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%funcstart = OpLabel
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%buf_1 = OpInBoundsPtrAccessChain %_ptr_CrossWorkgroup_uint %buf %ulong_1
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%buf_2 = OpInBoundsPtrAccessChain %_ptr_CrossWorkgroup_uint %buf %ulong_2
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%buf_3 = OpInBoundsPtrAccessChain %_ptr_CrossWorkgroup_uint %buf %ulong_3
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; Test device scope
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%clock_device = OpReadClockKHR %ulong %scope_device
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%device_low = OpUConvert %uint %clock_device
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OpStore %buf %device_low Volatile|Aligned 4
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; Test workgroup scope
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%clock_workgroup = OpReadClockKHR %ulong %scope_workgroup
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%workgroup_low = OpUConvert %uint %clock_workgroup
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OpStore %buf_1 %workgroup_low Volatile|Aligned 4
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; Test subgroup scope
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%clock_subgroup = OpReadClockKHR %ulong %scope_subgroup
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%subgroup_low = OpUConvert %uint %clock_subgroup
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OpStore %buf_2 %subgroup_low Volatile|Aligned 4
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OpStore %buf_3 %uint_1 Volatile|Aligned 4
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OpReturn
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OpFunctionEnd

‎IGC/ocloc_tests/Builtins/clock_tests/clock_read_uint2.spvasm

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;=========================== begin_copyright_notice ============================
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;
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; Copyright (C) 2025 Intel Corporation
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;
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; SPDX-License-Identifier: MIT
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;
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;============================ end_copyright_notice =============================
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; REQUIRES: spirv-as, regkeys, pvc-supported
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; RUN: spirv-as --target-env spv1.0 -o %t.spv %s
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; RUN: ocloc compile -spirv_input -file %t.spv -device pvc -options " -igc_opts 'PrintToConsole=1 PrintAfter=BuiltinsConverterFunction'" 2>&1 | FileCheck %s
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; CHECK: @llvm.genx.GenISA.cycleCounter()
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; Test case for ReadClockKHR returning uint2
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OpCapability Addresses
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OpCapability Linkage
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OpCapability Kernel
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OpCapability Int64
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OpCapability ShaderClockKHR
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OpExtension "SPV_KHR_shader_clock"
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OpMemoryModel Physical64 OpenCL
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OpEntryPoint Kernel %clock_uint2_test "clock_read_uint2_test"
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OpDecorate %buf Alignment 4
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%ulong = OpTypeInt 64 0
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%uint = OpTypeInt 32 0
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%uint2 = OpTypeVector %uint 2
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%uint_0 = OpConstant %uint 0
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%uint_1 = OpConstant %uint 1
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%uint_2 = OpConstant %uint 2
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%ulong_1 = OpConstant %ulong 1
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%ulong_2 = OpConstant %ulong 2
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%scope_device = OpConstant %uint 1
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%void = OpTypeVoid
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%_ptr_CrossWorkgroup_uint = OpTypePointer CrossWorkgroup %uint
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%functype = OpTypeFunction %void %_ptr_CrossWorkgroup_uint
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%clock_uint2_test = OpFunction %void None %functype
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%buf = OpFunctionParameter %_ptr_CrossWorkgroup_uint
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%funcstart = OpLabel
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%buf_1 = OpInBoundsPtrAccessChain %_ptr_CrossWorkgroup_uint %buf %ulong_1
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%buf_2 = OpInBoundsPtrAccessChain %_ptr_CrossWorkgroup_uint %buf %ulong_2
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%clock = OpReadClockKHR %uint2 %scope_device
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%clock_x = OpCompositeExtract %uint %clock 0
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%clock_y = OpCompositeExtract %uint %clock 1
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OpStore %buf %clock_x Volatile|Aligned 4
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OpStore %buf_1 %clock_y Volatile|Aligned 4
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OpStore %buf_2 %uint_1 Volatile|Aligned 4
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OpReturn
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OpFunctionEnd

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