Initial version of the Embedded Systems labs

Initial version of the Embedded Systems laboratory exercises

Author: fpgacademy

.gitignore

@@ -0,0 +1,6 @@
+# Releases directory
+release/
+
+# iv Files
+*.swp
+

LICENSE

@@ -1,6 +1,6 @@
 MIT License
 
-Copyright (c) 2021 fpgacademy
+Copyright (c) 2021 FPGAcademy.org
 
 Permission is hereby granted, free of charge, to any person obtaining a copy
 of this software and associated documentation files (the "Software"), to deal

README.md

@@ -1 +1,6 @@
-# LabExercisesEmbeddedSystems
+# Embedded Systems Laboratory Exercises
+
+These laboratory exercises cover such topics as: introduction to ARM processors and FPGA systems, introduction to 
+embedded Linux and code development in an embedded environment, memory-mapped I/O with virtual memory in user and 
+kernel space, kernel modules (device drivers), interrupts, and I/O devices such as buttons, switches, lights, 
+timers, accelerometers, audio, video, A/D, USB peripherals, and developing custom hardware systems in the FPGA.

common/docs/copyright.tex

@@ -0,0 +1,22 @@
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+%%% FPGAcademy Copyright Information %%%
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+
+%Always put the copyright on a new page (clear page), with some vertical space from top
+\clearpage
+\vspace{1in}
+
+\noindent
+
+Copyright {\copyright} FPGAcademy.org. All rights reserved. FPGAcademy and the 
+FPGAcademy logo are trademarks of FPGAcademy.org.  This document is provided 
+"as is", without warranty of any kind, express or implied, including but not 
+limited to the warranties of merchantability, fitness for a particular purpose 
+and noninfringement. In no event shall the authors or copyright holders be 
+liable for any claim, damages or other liability, whether in an action of 
+contract, tort or otherwise, arising from, out of or in connection with the 
+document or the use or other dealings in the document.
+~\\
+~\\
+**Other names and brands may be claimed as the property of others.
+

common/docs/defaulttext.tex

@@ -0,0 +1,17 @@
+\newcommand{\UPDatePublished}{Oct 2021}
+\newcommand{\versnum}{21.1} %version number quartus/AMP
+\newcommand{\quartusname}{Quartus\textsuperscript{\textregistered} Prime}	
+\newcommand{\UPTextBar}{For \quartusname{} \versnum{}}
+\newcommand{\thisyear}{2021 } %for copyright
+\newcommand{\company}{FPGAcademy.org}
+\newcommand{\longteamname}{FPGAcademy.org}
+\newcommand{\teamname}{FPGAcademy}
+\newcommand{\website}{FPGAcademy.org}
+
+\newcommand{\productAcronym}{AMP}
+\newcommand{\productNameShort}{Monitor Program}
+
+\newcommand{\productNameMedTM}{A Monitor Program}
+\newcommand{\productNameMed}{A Monitor Program}
+
+%\newcommand{\headerLogoFilePath}[1]{#1/FPGAcademy.png}

common/docs/listingsstyles.tex

@@ -0,0 +1,191 @@
+% listings is a package that supports encapsulating source code in LaTeX conveniently
+\usepackage{listings}
+
+\def\expandparam\lstinputlisting[#1]#2{\edef\tmp{\noexpand\lstinputlisting[#1]{#2}}\tmp}
+
+%%%%%%%%%%%%%%%%%%%% Source Code Formatting %%%%%%%%%%%%%%%%%%%%
+\definecolor{globalCommentColour}{rgb}{0.588,0.588,0.588}
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% Defining language style
+% NiosII ASM
+\lstdefinelanguage[NiosII]{Assembler} {
+  morekeywords={add, addi, and, andhi, andi, beq, bge, bgeu, bgt, bgtu, ble,  bleu, blt, bltu, bne, br, break,
+  bret, call, callr, cmpeq, cmpeqi, cmpge, cmpgei, cmpgeu, cmpgeui, cmpgt, cmpgti, cmpgtu, cmpgtui, cmple,
+  cmplei, cmpleu, cmpleui, cmplt, cmplti, cmpltu, cmpltui, cmpne, cmpnei, custom, div, divu, eret, flushd,
+  flushda, flushi, flushp, initd, initda, initi, jmp, jmpi, ldb, ldbio, ldbu, ldbuio, ldh, ldhio, ldhu, ldhuio,
+  ldw, ldwio, mov, movhi, movi, movia, movui, mul, muli, mulxss, mulxsu, mulxuu, nextpc, nop, nor, or, orhi, ori,
+  rdctl, rdprs, ret, rol, roli, ror, sll, slli, sra, srai, srl, srli, stb, stbio, sth, sthio, stw, stwio,
+  sub, subi, sync, trap, wrctl, wrtcl, wrprs, xor, xori, xorhi, xori},
+  morekeywords=[2]{.abort, .ABORT, .align, .app-file, .ascii, .asciz, .balign, .byte, .comm, .data, .def,
+  .desc, .dim, .double, .eject, .else, .end, .endef, .endif, .equ, .equiv, .err, .extern, .file, .fill, .float,
+  .global, .globl, .hword, .ident, .if, .include, .int, .irp, .irpc, .lcomm, .lflags, .line, .linkonce, .ln,
+  .list, .long, .macro, .mri, .nolist, .octa, .org, .p2align, .psize, .quad, .rept, .sbttl, .scl, .section,
+  .set, .short, .single, .size, .sleb128, .skip, .space, .stadb, .stabn, .stabs, .string, .symver, .tag,
+  .text, .title, .type, .val, .uleb128, .word},
+  morekeywords=[3]{et, bt, gp, sp, fp, ea, sstatus, ra, pc, status, estatus, bstatus, ienable, ipending, cpuid,
+  exception, pteaddr, tlbacc, tlbmisc, eccinj, badaddr, config, mpubase, mpuacc},
+  sensitive=t,
+  alsoletter=.,
+  morestring=[b]",
+  morecomment=[s]{/*}{*/},
+  morecomment=[l]\#,
+}[keywords,comments,strings]
+   
+%% NOTE: morekeywords=[2] are GNU directives.
+   
+\definecolor{niosInstructionColour}{rgb}{0.000,0.608,0.000}
+\definecolor{niosDirectiveColour}{rgb}{0.000,0.000,0.902}
+\definecolor{niosSpecialRegColour}{rgb}{0.000,0.000,0.000}
+\definecolor{niosStringColour}{rgb}{0.808,0.482,0.000}
+   
+%% NOTE: To make bold use: =\bfseries\color{<colour>}
+\lstdefinestyle{defaultNiosStyle} {
+  language=[NiosII]{Assembler},
+  stringstyle=\color{niosStringColour},
+  keywordstyle=\color{niosInstructionColour},
+  keywordstyle=[2]\color{niosDirectiveColour},
+  keywordstyle=[3]\itshape\color{niosSpecialRegColour}
+}
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% Defining language style
+% ArmA9 ASM
+\lstdefinelanguage[ArmA9]{Assembler} {
+  morekeywords={ADC, ADD, ADDS, AND, ANDS, B, BAL, BEQ, BGE, BGT, BL, BLT, BIC, BKPT, BLX, BNE, BX, CDP, CLZ, CMN, CMP, EOR,
+  EORS, LDC, LDM, LDR, LDRB, LDRBT, LDRH, LDRSB, LDRSH, LDRT, LSL, MCR, MLA, MOV, MOVW, MOVT, MRC, MRS, MSR, MUL, MVN, ORR, PLD,
+  ROR, RSB, RSC, SBC, SMLAL, SMULL, STC, STM, STR, STRB, STRBT, STRH, STRT, SUB, SUBS, SWI, SWP, SWPB, TEQ, UMLAL,
+  PUSH, POP, MOVS, RORS, LSR},
+  morekeywords=[2]{.abort, .ABORT, .align, .app-file, .ascii, .asciz, .balign, .byte, .comm, .data, .def,
+  .desc, .dim, .double, .eject, .else, .end, .endef, .endif, .equ, .equiv, .err, .extern, .file, .fill, .float,
+  .global, .globl, .hword, .ident, .if, .include, .int, .irp, .irpc, .lcomm, .lflags, .line, .linkonce, .ln,
+  .list, .long, .macro, .mri, .nolist, .octa, .org, .p2align, .psize, .quad, .rept, .sbttl, .scl, .section,
+  .set, .short, .single, .size, .sleb128, .skip, .space, .stadb, .stabn, .stabs, .string, .symver, .tag,
+  .text, .title, .type, .val, .vectors, .uleb128, .word},
+  morekeywords=[3]{SP, PC, MIDR, CTR, TCMTR, TLBTR, MPIDR, ID_PFR0, ID_PFR1, ID_DFR0, ID_MMFR0, ID_MMFR1, ID_MMFR2,
+  ID_MMFR3, ID_ISAR0, ID_ISAR1, ID_ISAR2, ID_ISAR3, ID_ISAR4, CCSIDR, CLIDR, AIDR, CSSELR, TTBR0, TTRB1, TTBR2, DACR,
+  DFSR, IFSR, ADFSR, AIFSR, DFAAR, IFAR, ICIALLUIS, BPIALLIS, PAR, ICIALLU, ICIMVAU, BPIALL, DCIMVAC, DCISW, V2PCWPR,
+  DCCVAC, DCCSW, DDIMVAC, DCISW, TLBALLIS, TLBIMVAIS, TLBIASIDIS, TLBIMVAAIS, TLBIALL, TLBIMVA, TLBIASID, TLBIMVAA,
+  PMCR, PMCNTENSET, PMCNTENCLR, PMOVSR, PMSWINC, PMSELR, PMXEVTYPER, PMXEVCNTR, PMUSERENR, PMINTENSET, PMINTENCLR,
+  PRRR, NRRR, PLEIDR, PLEASR, PLEFSR, PLEUAR, PLEPCR, VBAR, MVBAR, ISR, FCSEIDR, CONTEXTIDR, TPIDRURW, TPIDRURO, TPIDRPRW},
+  sensitive=f,
+  alsoletter=.,
+  morestring=[b]",
+  morecomment=[s]{/*}{*/},
+  morecomment=[l]{//},
+}[keywords,comments,strings]
+   
+%% NOTE: morekeywords=[2] are GNU directives.
+   
+\definecolor{armInstructionColour}{rgb}{0.000,0.608,0.000}
+\definecolor{armDirectiveColour}{rgb}{0.000,0.000,0.902}
+\definecolor{armSpecialRegColour}{rgb}{0.000,0.000,0.000}
+\definecolor{armStringColour}{rgb}{0.808,0.482,0.000}
+   
+\lstdefinestyle{defaultArmStyle} {
+  language=[ArmA9]{Assembler},
+  stringstyle=\color{armStringColour},
+  keywordstyle=\color{armInstructionColour},
+  keywordstyle=[2]\color{armDirectiveColour},
+  keywordstyle=[3]\itshape\color{armSpecialRegColour}
+}
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% Defining language style
+% FPGAcademy ASM
+\lstdefinelanguage{ASM}{
+  morekeywords = [1]{mv, mvt, mvne, mvcc, add, sub, st, ld, and, b, bne, beq, bcc, bcs},
+  morekeywords = [2]{word, define},
+  keywordstyle = [1]\color{ForestGreen},
+  keywordstyle = [2]\color{blue},
+  sensitive = true,
+  morecomment = [l]{//},
+}
+
+\lstset{
+  language = ASM,
+  basicstyle=\small\color{black}\ttfamily,
+  commentstyle=\small\color{Brown}\itshape\ttfamily,
+  showstringspaces=false,
+  frame=none, %lines % boxed listings
+  breaklines=true,
+  breakatwhitespace=true,
+  tabsize=3
+}
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% Defining language style
+% Java
+\definecolor{javaStringColour}{rgb}{0.808,0.482,0}
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% Defining language style
+% C
+\definecolor{CStringColour}{rgb}{0.808,0.482,0}
+
+\lstset{
+  language = C,
+  basicstyle=\small\color{black}\ttfamily, 
+  commentstyle=\small\color{PineGreen}\itshape\ttfamily,
+  keywordstyle=\small\color{blue}\bfseries\ttfamily,
+  showstringspaces=false,
+  frame=none, %lines % boxed listings
+  breaklines=true,
+  breakatwhitespace=true,
+  tabsize=3
+}
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% Defining language style
+% Verilog
+\definecolor{verilogCommentColour}{rgb}{0.000,0.502,0.000}
+
+\lstdefinestyle{defaultVerilogStyle} {
+  language={Verilog},
+  keywordstyle=\color{blue},
+  commentstyle=\color{verilogCommentColour}
+}
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% Defining language style
+% VHDL
+\lstdefinestyle{defaultVHDLStyle} {
+  language={VHDL},
+  keywordstyle=\color{blue},
+  commentstyle=\color{verilogCommentColour}
+}
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% Defining language style
+% LaTeX
+\lstdefinelanguage[LocalLaTeX]{TeX}[LaTeX]{TeX}{moretexcs={bf, it, sf, lstset},}
+
+\lstdefinestyle{defaultLocalLatexStyle} {
+  language=[LocalLatex]{TeX},
+  keywordstyle=\color{blue}\bfseries,
+  keywordstyle=[2]\color{blue},
+  keywordstyle=[3]\color{blue}\bfseries
+}
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
+% Defining language style
+% Default
+\lstset{
+  basicstyle=\small\color{black}\ttfamily,
+  commentstyle=\small\color{globalCommentColour}\itshape\ttfamily,
+  keywordstyle=\small\color{blue}\bfseries\ttfamily,
+  showstringspaces=false,
+  frame=none, %lines % boxed listings
+  breaklines=true,
+  breakatwhitespace=true,
+  tabsize=3
+}
+%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

common/docs/preamble.tex

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+\addtolength{\textwidth}{1.5in}
+\addtolength{\oddsidemargin}{-0.75in}
+\addtolength{\topmargin}{-0.75in}
+\addtolength{\textheight}{1.5in}
+\addtolength{\evensidemargin}{0.75in}
+\setlength\parindent{0pt}
+\raggedbottom
+
+\usepackage{ae,aecompl}
+\usepackage{epsfig,float,times}
+\usepackage[hypcap]{caption}
+\usepackage[pdftex, colorlinks]{hyperref}
+\usepackage{graphicx}
+\usepackage[usenames, dvipsnames]{color}
+\usepackage{rotating}
+\usepackage{tikz}
+\usetikzlibrary{automata,positioning}
+\usepackage{placeins}
+
+\widowpenalty 10000
+\clubpenalty 10000
+
+\newcommand{\red}[1]{{\color{red}\sf{#1}}}
+\newcommand{\green}[1]{{\color{green}\sf{#1}}}
+\newcommand{\blue}[1]{{\color{blue}\sf{#1}}}
+\definecolor{PineGreen}{rgb}{0.0, 0.47, 0.44}
+\definecolor{ForestGreen}{rgb}{0.13, 0.55, 0.13}
+\definecolor{Brown}{rgb}{0.59, 0.29, 0.0}
+
+\input{\CommonDocsPath/defaulttext.tex}
+\input{\CommonDocsPath/listingsstyles.tex}
+
+\hypersetup{
+  pdftitle={Embedded Systems Lab Exercise \LabNum},
+  linkcolor=blue,
+  hyperindex=true,
+  pdfauthor={FPGAcademy.org},
+  pdfkeywords={FPGAcademy.org, FPGAcademy, Lab, Exercise, Embedded Systems},
+  bookmarks,
+  bookmarksopen=false,
+  filecolor=blue,
+  pdfstartview={FitH},
+  urlcolor=blue,
+  plainpages=false,
+  pdfpagelabels=true,
+  linkbordercolor={1 1 1} %no color for link border
+}
+

lab1/design_files/DE1-SoC/README.txt

@@ -0,0 +1,7 @@
+The file part2 is an ARM executable program. It is a sample solution to Part II. This sample
+   solution exits after 12 seconds.
+
+The file part3.ko is a kernel module. It is a sample solution using the HEX0 display for Part III.
+
+The file part3_ASCII.ko is a kernel module. It is a sample solution using the Terminal window 
+for Part III.

lab1/design_files/DE1-SoC/address_map_arm.h

@@ -0,0 +1,38 @@
+/* Memory */
+#define DDR_BASE              0x00000000
+#define DDR_SPAN              0x3FFFFFFF
+#define A9_ONCHIP_BASE        0xFFFF0000
+#define A9_ONCHIP_SPAN        0x0000FFFF
+#define SDRAM_BASE            0xC0000000
+#define SDRAM_SPAN            0x03FFFFFF
+#define FPGA_ONCHIP_BASE      0xC8000000
+#define FPGA_ONCHIP_SPAN      0x0003FFFF
+#define FPGA_CHAR_BASE        0xC9000000
+#define FPGA_CHAR_SPAN        0x00001FFF
+
+/* Cyclone V FPGA devices */
+#define LW_BRIDGE_BASE			0xFF200000
+
+#define LEDR_BASE             0x00000000
+#define HEX3_HEX0_BASE        0x00000020
+#define HEX5_HEX4_BASE        0x00000030
+#define SW_BASE               0x00000040
+#define KEY_BASE              0x00000050
+#define JP1_BASE              0x00000060
+#define JP2_BASE              0x00000070
+#define PS2_BASE              0x00000100
+#define PS2_DUAL_BASE         0x00000108
+#define JTAG_UART_BASE        0x00001000
+#define JTAG_UART_2_BASE      0x00001008
+#define IrDA_BASE             0x00001020
+#define TIMER0_BASE           0x00002000
+#define TIMER1_BASE           0x00002020
+#define AV_CONFIG_BASE        0x00003000
+#define PIXEL_BUF_CTRL_BASE   0x00003020
+#define CHAR_BUF_CTRL_BASE    0x00003030
+#define AUDIO_BASE            0x00003040
+#define VIDEO_IN_BASE         0x00003060
+#define ADC_BASE              0x00004000
+
+#define LW_BRIDGE_SPAN			0x00005000
+

lab1/design_files/DE1-SoC/interrupt_ID.h

@@ -0,0 +1,21 @@
+/* FPGA interrupts (there are 64 in total; only a few are defined below) */
+#define	TIMER0_IRQ							72
+#define	KEY_IRQ		 						73
+#define	TIMER1_IRQ							74
+#define	FPGA_IRQ3	 						75
+#define	FPGA_IRQ4	 						76
+#define	FPGA_IRQ5	 						77
+#define	AUDIO_IRQ							78
+#define	PS2_IRQ		 						79
+#define	JTAG_IRQ		 						80
+#define	IrDA_IRQ		 						81
+#define	FPGA_IRQ10							82
+#define	JP1_IRQ								83
+#define	JP2_IRQ								84
+#define	FPGA_IRQ13							85
+#define	FPGA_IRQ14							86
+#define	FPGA_IRQ15							87
+#define	FPGA_IRQ16							88
+#define	PS2_DUAL_IRQ						89
+#define	FPGA_IRQ18							90
+#define	FPGA_IRQ19							91