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1 | 1 | #include "eXoCAN.h" |
2 | 2 |
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3 | 3 | // vers 1.0.1 02/06/2021 |
| 4 | +// vers 1.0.2 04/15/2021 |
4 | 5 |
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5 | 6 | void eXoCAN::begin(idtype addrType, int brp, BusType hw) |
6 | 7 | { |
@@ -125,26 +126,27 @@ void eXoCAN::filter16Init(int bank, int mode, int a, int b, int c, int d) // 16b |
125 | 126 | periphBit(FINIT) = 0; // ~FINIT 'active' filter mode ] |
126 | 127 | } |
127 | 128 |
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128 | | -void eXoCAN::filterList32Init(int bank, int idA, int idB) //32b filters |
| 129 | +void eXoCAN::filterList32Init(int bank, u_int32_t idA, u_int32_t idB) //32b filters |
129 | 130 | { |
130 | | - filter32Init(bank, 1, idA, idB); |
| 131 | + filter32Init(bank, 1, idA, idB); |
| 132 | + // filter32Init(0, 1, 0x00232461, 0x00232461); |
131 | 133 | } |
132 | 134 |
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133 | | -void eXoCAN::filterMask32Init(int bank, int id, int mask) //32b filters |
| 135 | +void eXoCAN::filterMask32Init(int bank, u_int32_t id, u_int32_t mask) //32b filters |
134 | 136 | { |
135 | 137 | filter32Init(bank, 0, id, mask); |
136 | 138 | } |
137 | 139 |
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138 | | -void eXoCAN::filter32Init(int bank, int mode, int a, int b) //32b filters |
| 140 | +void eXoCAN::filter32Init(int bank, int mode, u_int32_t a, u_int32_t b) //32b filters |
139 | 141 | { |
140 | | - periphBit(FINIT) = 1; // FINIT 'init' filter mode ] |
141 | | - periphBit(fa1r, bank) = 0; // de-activate filter 'bank' |
142 | | - periphBit(fs1r, bank) = 1; // fsc filter scale reg, 0 => 2ea. 16b, 1=>32b |
143 | | - periphBit(fm1r, bank) = mode; // fbm list mode = 1, 0 = mask |
144 | | - MMIO32(fr1 + (8 * bank)) = a << 21; // the RXID/MASK to match ] |
145 | | - MMIO32(fr2 + (8 * bank)) = b << 21; // must replace a mask of zeros so that everything isn't passed |
146 | | - periphBit(fa1r, bank) = 1; // activate this filter ] |
147 | | - periphBit(FINIT) = 0; // ~FINIT 'active' filter mode ] |
| 142 | + periphBit(FINIT) = 1; // FINIT 'init' filter mode |
| 143 | + periphBit(fa1r, bank) = 0; // de-activate filter 'bank' |
| 144 | + periphBit(fs1r, bank) = 1; // fsc filter scale reg, 0 => 2ea. 16b, 1=>32b |
| 145 | + periphBit(fm1r, bank) = mode; // fbm list mode = 1, 0 = mask |
| 146 | + MMIO32(fr1 + (8 * bank)) = (a << 3) | 4; // the RXID/MASK to match |
| 147 | + MMIO32(fr2 + (8 * bank)) = (b << 3) | 4; // must replace a mask of zeros so that everything isn't passed |
| 148 | + periphBit(fa1r, bank) = 1; // activate this filter |
| 149 | + periphBit(FINIT) = 0; // ~FINIT 'active' filter mode |
148 | 150 | } |
149 | 151 |
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150 | 152 | //bool eXoCAN::transmit(int txId, const void *ptr, unsigned int len) |
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