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Remove "padding" bytes from x86 register packet (#171)
Turns out these were actually Linux-specific registers, namely `orig_eax` for 32-bit and `orig_eax`/`fs_base`/`gs_base` for 64-bit. GDB will gracefully handle a too-short packet but not a too-long one, so removing this padding should make this work for all x86 targets and not just Linux. Fixes #165
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2 files changed

+47
-9
lines changed

2 files changed

+47
-9
lines changed

gdbstub_arch/src/x86/reg/core32.rs

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -84,13 +84,10 @@ impl Registers for X86CoreRegs {
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// mxcsr
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write_bytes!(&self.mxcsr.to_le_bytes());
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// padding
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(0..4).for_each(|_| write_byte(None))
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}
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fn gdb_deserialize(&mut self, bytes: &[u8]) -> Result<(), ()> {
93-
if bytes.len() < 0x138 {
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if bytes.len() < 0x134 {
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return Err(());
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}
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gdbstub_arch/src/x86/reg/core64.rs

Lines changed: 46 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -71,11 +71,6 @@ impl Registers for X86_64CoreRegs {
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// mxcsr
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write_bytes!(&self.mxcsr.to_le_bytes());
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// padding?
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// XXX: Couldn't figure out what these do and GDB doesn't actually display any
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// registers that use these values.
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(0..0x18).for_each(|_| write_byte(None))
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}
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fn gdb_deserialize(&mut self, bytes: &[u8]) -> Result<(), ()> {
@@ -117,3 +112,49 @@ impl Registers for X86_64CoreRegs {
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Ok(())
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}
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}
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#[cfg(test)]
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mod tests {
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use super::*;
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#[test]
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fn x86_64_core_round_trip() {
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let regs_before = X86_64CoreRegs {
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regs: [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16],
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eflags: 17,
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rip: 18,
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segments: X86SegmentRegs {
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cs: 19,
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ss: 20,
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ds: 21,
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es: 22,
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fs: 23,
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gs: 24,
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},
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st: Default::default(),
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fpu: X87FpuInternalRegs {
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fctrl: 25,
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fstat: 26,
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ftag: 27,
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fiseg: 28,
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fioff: 29,
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foseg: 30,
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fooff: 31,
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fop: 32,
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},
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xmm: Default::default(),
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mxcsr: 99,
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};
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let mut data = vec![];
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regs_before.gdb_serialize(|x| {
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data.push(x.unwrap_or(b'x'));
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});
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let mut regs_after = X86_64CoreRegs::default();
156+
regs_after.gdb_deserialize(&data).unwrap();
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assert_eq!(regs_before, regs_after);
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}
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}

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