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wildea01Ingo Molnar
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locking/atomic/bitops: Document and clarify ordering semantics for failed test_and_{}_bit()
A test_and_{}_bit() operation fails if the value of the bit is such that the modification does not take place. For example, if test_and_set_bit() returns 1. In these cases, follow the behaviour of cmpxchg and allow the operation to be unordered. This also applies to test_and_set_bit_lock() if the lock is found to be be taken already. Signed-off-by: Will Deacon <[email protected]> Acked-by: Peter Zijlstra (Intel) <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Paul E. McKenney <[email protected]> Cc: Thomas Gleixner <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Ingo Molnar <[email protected]>
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Documentation/atomic_bitops.txt

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@@ -58,7 +58,12 @@ Like with atomic_t, the rule of thumb is:
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- RMW operations that have a return value are fully ordered.
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Except for test_and_set_bit_lock() which has ACQUIRE semantics and
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- RMW operations that are conditional are unordered on FAILURE,
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otherwise the above rules apply. In the case of test_and_{}_bit() operations,
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if the bit in memory is unchanged by the operation then it is deemed to have
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failed.
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Except for a successful test_and_set_bit_lock() which has ACQUIRE semantics and
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clear_bit_unlock() which has RELEASE semantics.
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Since a platform only has a single means of achieving atomic operations

include/asm-generic/bitops/lock.h

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* @nr: Bit to set
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* @addr: Address to count from
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*
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* This operation is atomic and provides acquire barrier semantics.
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* This operation is atomic and provides acquire barrier semantics if
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* the returned value is 0.
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* It can be used to implement bit locks.
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*/
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#define test_and_set_bit_lock(nr, addr) test_and_set_bit(nr, addr)

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