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located the bug with intel build of pin 3.4 that doesn\'t allow for xbegin or xend instructions to occur when monitoring branch instructions as part of ppm
1 parent 56e4988 commit 1293082

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4 files changed

+40
-20
lines changed

4 files changed

+40
-20
lines changed

Makefile

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ endif
66

77
include $(CONFIG_ROOT)/makefile.config
88
include $(TOOLS_ROOT)/Config/makefile.default.rules
9-
CXXFLAGS = -std=gnu++98 -DVERBOSE -Wall -Werror -Wno-unknown-pragmas $(DBG) $(OPT)
9+
CXXFLAGS = -std=gnu++11 -DVERBOSE -Wall -Werror -Wno-unknown-pragmas $(DBG) $(OPT)
1010

1111
SRC_DIR := .
1212
SRC_FILES := $(wildcard $(SRC_DIR)/*.cpp)

mica.cpp

Lines changed: 10 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -80,12 +80,16 @@ ofstream _log;
8080
/* append <pid>_pin.out to name if necessary */
8181
const char *mkfilename(const char *name)
8282
{
83-
stringstream ret;
84-
if (append_pid)
85-
ret << name << "_" << setfill('0') << setw(5) << getpid() << "_pin.out";
86-
else
87-
ret << name << "_pin.out";
88-
return ret.str().c_str();
83+
char retx[100];
84+
if (append_pid){
85+
sprintf(retx,"%s_%d_pin.out",name,getpid());
86+
}
87+
else{
88+
sprintf(retx,"%s_pin.out",name);
89+
}
90+
char * x = (char*)malloc(sizeof(const char)*100);
91+
strcpy(x,retx);
92+
return (const char*)x;
8993
}
9094

9195
// find buffer entry for instruction at given address in a hash table

mica_ilp.cpp

Lines changed: 13 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -138,9 +138,9 @@ void init_ilp_one(){
138138
cerr << "ERROR! Interval size is not a multiple of ILP buffer size. (" << interval_size << " vs " << ILP_BUFFER_SIZE << ")" << endl;
139139
exit(-1);
140140
}
141-
stringstream filename;
142-
filename << "ilp-win" << win_size << "_phases_int";
143-
output_file_ilp_one.open(mkfilename(filename.str().c_str()), ios::out|ios::trunc);
141+
char filename[100];
142+
sprintf(filename, "ilp-win%d_phases_int", win_size);
143+
output_file_ilp_one.open(mkfilename(filename), ios::out|ios::trunc);
144144
output_file_ilp_one.close();
145145
}
146146
}
@@ -207,9 +207,10 @@ VOID ilp_instr_intervals_one(){
207207

208208
if(interval_ins_count_for_hpc_alignment == interval_size){
209209

210-
stringstream filename;
211-
filename << "ilp-win" << win_size << "_phases_int";
212-
output_file_ilp_one.open(mkfilename(filename.str().c_str()), ios::out|ios::app);
210+
char filename[100];
211+
sprintf(filename, "ilp-win%d_phases_int", win_size);
212+
213+
output_file_ilp_one.open(mkfilename(filename), ios::out|ios::app);
213214

214215
output_file_ilp_one << interval_size << " " << cpuClock_interval << endl;
215216

@@ -408,18 +409,19 @@ VOID writeMem_ilp_one(ADDRINT effAddr, ADDRINT size){
408409
/* finishing... */
409410
VOID fini_ilp_one(INT32 code, VOID* v){
410411

411-
stringstream filename;
412+
char filename[100];
412413

413414
fini_ilp_buffering_one();
414415

415416
if(interval_size == -1){
416-
filename << "ilp-win" << win_size << "_full_int";
417-
output_file_ilp_one.open(mkfilename(filename.str().c_str()), ios::out|ios::trunc);
417+
sprintf(filename, "ilp-win%d_full_int", win_size);
418+
419+
output_file_ilp_one.open(mkfilename(filename), ios::out|ios::trunc);
418420
output_file_ilp_one << total_ins_count;
419421
}
420422
else{
421-
filename << "ilp-win" << win_size << "_phases_int";
422-
output_file_ilp_one.open(mkfilename(filename.str().c_str()), ios::out|ios::app);
423+
sprintf(filename, "ilp-win%d_phases_int", win_size);
424+
output_file_ilp_one.open(mkfilename(filename), ios::out|ios::app);
423425
output_file_ilp_one << interval_ins_count;
424426
}
425427
output_file_ilp_one << " " << cpuClock_interval << endl;

mica_ppm.cpp

Lines changed: 16 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -532,8 +532,9 @@ void register_condBr(ADDRINT ins_addr){
532532
indices_condBr[numStatCondBranchInst++] = ins_addr;
533533
}
534534

535+
static int _count = 0;
535536
VOID instrument_ppm_cond_br(INS ins){
536-
UINT32 index = index_condBr(INS_Address(ins));
537+
UINT32 index = index_condBr(INS_Address(ins));
537538
if(index < 1){
538539

539540
/* We don't know the number of static conditional branch instructions up front,
@@ -544,8 +545,21 @@ VOID instrument_ppm_cond_br(INS ins){
544545
index = numStatCondBranchInst;
545546

546547
register_condBr(INS_Address(ins));
548+
register_condBr(INS_Address(ins));
547549
}
548-
INS_InsertCall(ins, IPOINT_BEFORE, (AFUNPTR)condBr, IARG_UINT32, index, IARG_BRANCH_TAKEN, IARG_END);
550+
551+
const char* str = INS_Disassemble(ins).c_str();
552+
const char* substr = "xbegin";
553+
if (strncmp(str, substr, strlen(substr)) == 0){
554+
printf("as of pin 3.4 -- I don't think we can parse xbegin so skipping...\n");
555+
return;
556+
}
557+
substr = "xend";
558+
if (strncmp(str, substr, strlen(substr)) == 0){
559+
printf("as of pin 3.4 -- I don't think we can parse xend so skipping...\n");
560+
return;
561+
}
562+
INS_InsertCall(ins, IPOINT_BEFORE, (AFUNPTR)condBr,IARG_UINT32, index, IARG_BRANCH_TAKEN, IARG_END);
549563
}
550564

551565
/* instrumenting (instruction level) */

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