Merge pull request hdl#411 from hzeller/feature-20250614-find-python

Make sure the Python interpreter can be found.

Author: QuantamHD

dependency_support/com_google_skywater_pdk/build_defs.bzl

@@ -54,6 +54,7 @@ def _skywater_corner_impl(ctx):
         inputs = ctx.files.srcs,
         arguments = [args],
         executable = ctx.executable._liberty_tool,
+        use_default_shell_env = True,
     )
 
     return [

dependency_support/org_theopenroadproject_asap7_pdk_r1p7/asap7.bzl

@@ -247,6 +247,7 @@ def _asap7_cell_library_impl(ctx):
         inputs = default_corner_libraries,
         arguments = [args],
         executable = ctx.executable._combine_liberty,
+        use_default_shell_env = True,
     )
 
     open_road_configuration = None

synthesis/build_defs.bzl

@@ -363,6 +363,11 @@ synthesize_rtl = rule(
         "deps": attr.label_list(
             providers = [[VerilogInfo], [UhdmInfo]],
         ),
+        "early_techmap": attr.label(
+            allow_single_file = True,
+            doc = "verilog/system verilog file for early techmap process",
+            mandatory = False,
+        ),
         "extra_tcl_command": attr.string(
             default = "",
         ),
@@ -399,11 +404,6 @@ synthesize_rtl = rule(
             executable = True,
             cfg = "exec",
         ),
-        "early_techmap": attr.label(
-            allow_single_file = True,
-            mandatory = False,
-            doc = "verilog/system verilog file for early techmap process"
-        ),
     },
 )