Merge pull request #191 from trisp3ar/develop

start routing, setting rules

Author: justcallmekoko

PCBs/FlipperZero/WiFi-Devboard-Pro/WiFi-Devboard-Pro.kicad_pcb

@@ -38,6 +38,19 @@
   )
 
   (setup
+    (stackup
+      (layer "F.SilkS" (type "Top Silk Screen"))
+      (layer "F.Paste" (type "Top Solder Paste"))
+      (layer "F.Mask" (type "Top Solder Mask") (thickness 0.01))
+      (layer "F.Cu" (type "copper") (thickness 0.035))
+      (layer "dielectric 1" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
+      (layer "B.Cu" (type "copper") (thickness 0.035))
+      (layer "B.Mask" (type "Bottom Solder Mask") (thickness 0.01))
+      (layer "B.Paste" (type "Bottom Solder Paste"))
+      (layer "B.SilkS" (type "Bottom Silk Screen"))
+      (copper_finish "None")
+      (dielectric_constraints no)
+    )
     (pad_to_mask_clearance 0)
     (pcbplotparams
       (layerselection 0x00010fc_ffffffff)
@@ -508,22 +521,22 @@
 
   (footprint "Connector_PinHeader_2.54mm:PinHeader_1x11_P2.54mm_Vertical" (layer "F.Cu")
     (tedit 59FED5CC) (tstamp 2789fafa-8aae-4fa8-aafc-c2561d026b1c)
-    (at 154.75 89.85 -90)
+    (at 129.37 109.94 90)
     (descr "Through hole straight pin header, 1x11, 2.54mm pitch, single row")
     (tags "Through hole pin header THT 1x11 2.54mm single row")
     (property "Sheetfile" "WiFi-Devboard-Pro.kicad_sch")
     (property "Sheetname" "")
     (path "/46b2570d-01f5-4435-97bc-ab401c2278d8")
     (attr through_hole)
-    (fp_text reference "J4" (at 0 -2.33 90) (layer "F.SilkS") hide
+    (fp_text reference "J4" (at 0 -2.33 90) (layer "User.1") hide
       (effects (font (size 1 1) (thickness 0.15)))
       (tstamp 66a81219-e469-46ed-aff6-d127f8852d50)
     )
     (fp_text value "Conn_01x11" (at 0 27.73 90) (layer "F.Fab") hide
       (effects (font (size 1 1) (thickness 0.15)))
       (tstamp 57b1d583-205c-4b08-b0c2-dc5cfca079ea)
     )
-    (fp_text user "${REFERENCE}" (at 0 12.7) (layer "F.Fab") hide
+    (fp_text user "${REFERENCE}" (at 0 12.7) (layer "User.1") hide
       (effects (font (size 1 1) (thickness 0.15)))
       (tstamp 3697c16c-a32d-4dfe-84bc-99548b6d2489)
     )
@@ -542,27 +555,27 @@
     (fp_line (start 1.27 -1.27) (end 1.27 26.67) (layer "F.Fab") (width 0.1) (tstamp 7daa10e8-b897-4b60-b148-1824f2d23912))
     (fp_line (start -1.27 26.67) (end -1.27 -0.635) (layer "F.Fab") (width 0.1) (tstamp 9ffe55fd-f998-4ef3-9805-6a3dfcc5c4e8))
     (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer "F.Fab") (width 0.1) (tstamp d1e3a591-336f-4157-aa81-d0fc5e767dbc))
-    (pad "1" thru_hole circle (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+    (pad "1" thru_hole circle (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
       (net 3 "+3V3") (pinfunction "Pin_1") (pintype "passive") (tstamp d41f96be-ab50-4ed0-a79c-855f1eeb6f4b))
-    (pad "2" thru_hole oval (at 0 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+    (pad "2" thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
       (net 1 "GND") (pinfunction "Pin_2") (pintype "passive") (tstamp 2e80331c-ca6a-462d-bbcc-015ac5f5fdee))
-    (pad "3" thru_hole oval (at 0 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+    (pad "3" thru_hole oval (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
       (net 44 "FLP_GPIO_0") (pinfunction "Pin_3") (pintype "passive") (tstamp 21bdd596-2987-4415-995c-468c602f529f))
-    (pad "4" thru_hole oval (at 0 7.62 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+    (pad "4" thru_hole oval (at 0 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
       (net 30 "GPIO05") (pinfunction "Pin_4") (pintype "passive") (tstamp 1e1ea668-8010-4889-993d-ef22f6cb950c))
-    (pad "5" thru_hole oval (at 0 10.16 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+    (pad "5" thru_hole oval (at 0 10.16 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
       (net 25 "GPIO02") (pinfunction "Pin_5") (pintype "passive") (tstamp 47247e87-9126-4674-b122-9e24ca669c01))
-    (pad "6" thru_hole oval (at 0 12.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+    (pad "6" thru_hole oval (at 0 12.7 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
       (net 29 "GPIO17") (pinfunction "Pin_6") (pintype "passive") (tstamp 832ab314-8294-45c4-b35d-8bd7ef94922a))
-    (pad "7" thru_hole oval (at 0 15.24 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+    (pad "7" thru_hole oval (at 0 15.24 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
       (net 31 "GPIO18") (pinfunction "Pin_7") (pintype "passive") (tstamp 47ae051d-5416-4500-a2c2-83ca093b4e75))
-    (pad "8" thru_hole oval (at 0 17.78 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+    (pad "8" thru_hole oval (at 0 17.78 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
       (net 32 "GPIO19") (pinfunction "Pin_8") (pintype "passive") (tstamp d4c61ef9-ccf8-4ac6-bd6c-c94f582603e1))
-    (pad "9" thru_hole oval (at 0 20.32 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+    (pad "9" thru_hole oval (at 0 20.32 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
       (net 34 "GPIO21") (pinfunction "Pin_9") (pintype "passive") (tstamp 049843d5-be01-4b0e-ae61-1e889a7aeaed))
-    (pad "10" thru_hole oval (at 0 22.86 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+    (pad "10" thru_hole oval (at 0 22.86 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
       (net 37 "GPIO22") (pinfunction "Pin_10") (pintype "passive") (tstamp 49e6c3ec-e45a-4c04-9fee-82be837db034))
-    (pad "11" thru_hole oval (at 0 25.4 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+    (pad "11" thru_hole oval (at 0 25.4 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
       (net 38 "GPIO23") (pinfunction "Pin_11") (pintype "passive") (tstamp 4fc3ec87-5b79-4a6c-92f1-64f0d4acf71e))
     (model "${KICAD6_3DMODEL_DIR}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x11_P2.54mm_Vertical.wrl"
       (offset (xyz 0 0 0))
@@ -1113,7 +1126,7 @@
 
   (footprint "Libraries:RESC1005X40N" (layer "F.Cu")
     (tedit 0) (tstamp 48dd7200-e646-4b32-9112-58984a0896f8)
-    (at 155.35 96.95 180)
+    (at 155.4 97.43 180)
     (descr "RC0402")
     (tags "Resistor")
     (property "Arrow Part Number" "RC0402FR-07220RL")
@@ -1459,7 +1472,7 @@
 
   (footprint "Libraries:CAPC1005X55N" (layer "F.Cu")
     (tedit 0) (tstamp 6b4a4b6b-8171-49ec-b5a2-9c99e890faaf)
-    (at 155.45 102.7)
+    (at 155.39 102.15)
     (descr "CC0402")
     (tags "Capacitor")
     (property "Arrow Part Number" "CC0402KRX7R7BB104")
@@ -1750,15 +1763,15 @@
     (property "Sheetname" "")
     (path "/f9b51342-dbdf-4188-bfea-3a3f82fcc6ca")
     (attr smd)
-    (fp_text reference "S1" (at 0 0) (layer "F.SilkS")
+    (fp_text reference "S1" (at 0 0) (layer "User.1")
       (effects (font (size 1.27 1.27) (thickness 0.254)))
       (tstamp 1ba7b981-a901-4669-b665-10ea372e2175)
     )
     (fp_text value "SKRPABE010" (at 0 0) (layer "F.SilkS") hide
       (effects (font (size 1.27 1.27) (thickness 0.254)))
       (tstamp 6b13da7e-9967-460b-b754-20f1e8a6432f)
     )
-    (fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab")
+    (fp_text user "${REFERENCE}" (at 0 0) (layer "User.1")
       (effects (font (size 1.27 1.27) (thickness 0.254)))
       (tstamp 576728d6-47f1-4f3b-b36e-7d9a0b3012fc)
     )
@@ -1796,7 +1809,7 @@
 
   (footprint "Libraries:RESC1005X40N" (layer "F.Cu")
     (tedit 0) (tstamp a0ca85ae-31ee-4a44-8ed3-73cfec7d2e01)
-    (at 148.85 93.8 90)
+    (at 149.85 93.3 180)
     (descr "RC0402")
     (tags "Resistor")
     (property "Arrow Part Number" "RC0402FR-0710KL")
@@ -1813,15 +1826,15 @@
     (property "Sheetname" "")
     (path "/c56ef6a3-fb1c-466e-bd09-0da64fa514b7")
     (attr smd)
-    (fp_text reference "R1" (at 0 0 90) (layer "F.SilkS")
+    (fp_text reference "R1" (at 0 0) (layer "F.SilkS")
       (effects (font (size 1.27 1.27) (thickness 0.254)))
       (tstamp eb0cf0e6-4b5f-4517-a5a8-7fc072a66ae3)
     )
-    (fp_text value "10k" (at 0 0 90) (layer "F.SilkS") hide
+    (fp_text value "10k" (at 0 0) (layer "F.SilkS") hide
       (effects (font (size 1.27 1.27) (thickness 0.254)))
       (tstamp 884f82c6-17b6-4b15-8e1f-0d828a616a04)
     )
-    (fp_text user "${REFERENCE}" (at 0 0 90) (layer "F.Fab")
+    (fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab")
       (effects (font (size 1.27 1.27) (thickness 0.254)))
       (tstamp 116211e4-ab6a-4b4d-b5dd-1d2041818423)
     )
@@ -1833,9 +1846,9 @@
     (fp_line (start 0.5 -0.25) (end 0.5 0.25) (layer "F.Fab") (width 0.1) (tstamp 7afd8477-343d-4946-9ac9-9ba7112265e7))
     (fp_line (start 0.5 0.25) (end -0.5 0.25) (layer "F.Fab") (width 0.1) (tstamp a7c5efe7-2710-4155-8637-adb21b6542b9))
     (fp_line (start -0.5 -0.25) (end 0.5 -0.25) (layer "F.Fab") (width 0.1) (tstamp b935f029-c73f-444b-8ab1-fa857d0e28df))
-    (pad "1" smd rect locked (at -0.55 0 180) (size 0.6 0.75) (layers "F.Cu" "F.Paste" "F.Mask")
+    (pad "1" smd rect locked (at -0.55 0 270) (size 0.6 0.75) (layers "F.Cu" "F.Paste" "F.Mask")
       (net 2 "RESET") (pintype "passive") (tstamp 58100718-b5e5-42f4-afe8-b3ec9dfe686d))
-    (pad "2" smd rect locked (at 0.55 0 180) (size 0.6 0.75) (layers "F.Cu" "F.Paste" "F.Mask")
+    (pad "2" smd rect locked (at 0.55 0 270) (size 0.6 0.75) (layers "F.Cu" "F.Paste" "F.Mask")
       (net 3 "+3V3") (pintype "passive") (tstamp ed0a3d1b-50d1-496f-817d-15ea3d945283))
     (model "RC0402FR-07220RL.stp"
       (offset (xyz 0 0 0))
@@ -1946,7 +1959,7 @@
 
   (footprint "Connector_PinHeader_2.54mm:PinHeader_1x11_P2.54mm_Vertical" (layer "F.Cu")
     (tedit 59FED5CC) (tstamp b20e1001-a742-4838-99b7-9737bd06d320)
-    (at 129.35 109.95 90)
+    (at 161.2 83.25 90)
     (descr "Through hole straight pin header, 1x11, 2.54mm pitch, single row")
     (tags "Through hole pin header THT 1x11 2.54mm single row")
     (property "Sheetfile" "WiFi-Devboard-Pro.kicad_sch")
@@ -2061,7 +2074,7 @@
 
   (footprint "Libraries:CAPC1005X60N" (layer "F.Cu")
     (tedit 0) (tstamp b9ef61f4-98e3-41e0-b1c8-ced8898fa296)
-    (at 149.95 93.8 -90)
+    (at 149.85 94.45)
     (descr "CL05A105KA5NQNC")
     (tags "Capacitor")
     (property "Arrow Part Number" "CL05A105KA5NQNC")
@@ -2078,15 +2091,15 @@
     (property "Sheetname" "")
     (path "/40adbb6d-87aa-405c-ba38-fc70c2bcc5dc")
     (attr smd)
-    (fp_text reference "C1" (at 0 0 -90) (layer "F.SilkS")
+    (fp_text reference "C1" (at 0 0) (layer "F.SilkS")
       (effects (font (size 1.27 1.27) (thickness 0.254)))
       (tstamp 27aabb6f-bda4-42f0-9044-404ec7a1b49f)
     )
-    (fp_text value "1u" (at 0 0 -90) (layer "F.SilkS") hide
+    (fp_text value "1u" (at 0 0) (layer "F.SilkS") hide
       (effects (font (size 1.27 1.27) (thickness 0.254)))
       (tstamp bb2c2a32-f063-45d0-9a83-bf494e1a8555)
     )
-    (fp_text user "${REFERENCE}" (at 0 0 -90) (layer "F.Fab")
+    (fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab")
       (effects (font (size 1.27 1.27) (thickness 0.254)))
       (tstamp 577e7b65-da78-486a-8cb1-58aef05d22ab)
     )
@@ -2098,9 +2111,9 @@
     (fp_line (start -0.5 -0.25) (end 0.5 -0.25) (layer "F.Fab") (width 0.1) (tstamp 86f185ab-9a8a-429c-9c8d-754e156533ae))
     (fp_line (start -0.5 0.25) (end -0.5 -0.25) (layer "F.Fab") (width 0.1) (tstamp cd07ad71-cb53-406b-a66e-d7ba32cc2ad0))
     (fp_line (start 0.5 0.25) (end -0.5 0.25) (layer "F.Fab") (width 0.1) (tstamp fff3455a-500d-431a-a59d-8d6cff62d9e5))
-    (pad "1" smd rect locked (at -0.46 0 270) (size 0.62 0.64) (layers "F.Cu" "F.Paste" "F.Mask")
+    (pad "1" smd rect locked (at -0.46 0) (size 0.62 0.64) (layers "F.Cu" "F.Paste" "F.Mask")
       (net 1 "GND") (pintype "passive") (tstamp 78c5e443-36a0-457a-b164-4192b4dbcb43))
-    (pad "2" smd rect locked (at 0.46 0 270) (size 0.62 0.64) (layers "F.Cu" "F.Paste" "F.Mask")
+    (pad "2" smd rect locked (at 0.46 0) (size 0.62 0.64) (layers "F.Cu" "F.Paste" "F.Mask")
       (net 2 "RESET") (pintype "passive") (tstamp 0d9dabff-4a72-49f1-9297-389fbfe62cb9))
     (model "CL05A105KA5NQNC.stp"
       (offset (xyz 0 0 0))
@@ -3552,7 +3565,7 @@
   (gr_text "17" (at 142.05 91.45) (layer "F.SilkS") (tstamp 17f94474-ec52-4de0-89c7-9114d1dbcc1f)
     (effects (font (size 0.75 0.75) (thickness 0.15)))
   )
-  (gr_text "3V3" (at 127.4 100.2) (layer "F.SilkS") (tstamp 284bafc7-41c3-45b1-98cb-6645d3559213)
+  (gr_text "3V3" (at 127.89 100.29) (layer "F.SilkS") (tstamp 284bafc7-41c3-45b1-98cb-6645d3559213)
     (effects (font (size 0.75 0.75) (thickness 0.15)))
   )
   (gr_text "GND" (at 152.25 91.45) (layer "F.SilkS") (tstamp 2bfa3cf3-1eb9-4931-8fc8-6056a91ab0f2)
@@ -3622,6 +3635,27 @@
     (effects (font (size 0.75 0.75) (thickness 0.15)))
   )
 
+  (segment (start 175.29 91.69) (end 175.29 91.1) (width 0.2) (layer "F.Cu") (net 3) (tstamp 0b943514-fbab-41a6-9c2c-370c2a61f2cf))
+  (segment (start 178.86 90.3) (end 179.89 90.3) (width 0.2) (layer "F.Cu") (net 3) (tstamp 0ccac03a-75ca-45b3-98d3-4fe62f624188))
+  (segment (start 179.89 90.3) (end 179.94 90.35) (width 0.2) (layer "F.Cu") (net 3) (tstamp 200e9ea6-eb43-4b22-9360-1cd8a4a8dc81))
+  (segment (start 177.520489 92.149511) (end 175.749511 92.149511) (width 0.2) (layer "F.Cu") (net 3) (tstamp 352cc2a7-3cea-4cbc-9663-3b2838969441))
+  (segment (start 178.86 90.3) (end 178.86 90.81) (width 0.2) (layer "F.Cu") (net 3) (tstamp 39636dff-c077-4f61-8da7-d096f1341cae))
+  (segment (start 178.86 90.81) (end 177.520489 92.149511) (width 0.2) (layer "F.Cu") (net 3) (tstamp 3f6ec6fd-3b6d-42d1-991f-a1243d13dd70))
+  (segment (start 175.749511 92.149511) (end 175.29 91.69) (width 0.2) (layer "F.Cu") (net 3) (tstamp a246fa10-b537-4ccd-932a-55ea00080f7f))
+  (segment (start 175.3 107.6) (end 175.29 107.61) (width 0.1) (layer "F.Cu") (net 38) (tstamp 2b756c1f-b128-472d-bc46-5680eab4a92d))
+  (segment (start 175.29 107.61) (end 175.29 108.6) (width 0.1) (layer "F.Cu") (net 38) (tstamp aa5f3d73-18df-45c0-a34c-a328326a2bbb))
+  (via (at 175.3 107.6) (size 0.3) (drill 0.2) (layers "F.Cu" "B.Cu") (net 38) (tstamp 7f87518f-55cb-45ce-bd27-a28bf1353986))
+  (segment (start 155.6 109.55) (end 155.31002 109.83998) (width 0.1) (layer "B.Cu") (net 38) (tstamp 16a2baff-dca2-4064-959c-1edc0d5d0bdf))
+  (segment (start 173.35 109.55) (end 155.6 109.55) (width 0.1) (layer "B.Cu") (net 38) (tstamp 57447698-8be8-47f7-a853-2fa69879a8e4))
+  (segment (start 155.31002 109.83998) (end 154.77 109.83998) (width 0.1) (layer "B.Cu") (net 38) (tstamp 689f26ad-bc50-42b2-b902-3d34fe7e4285))
+  (segment (start 175.3 107.6) (end 173.35 109.55) (width 0.1) (layer "B.Cu") (net 38) (tstamp a2fc7629-6ba5-473f-ae36-d5cde8e5627a))
+  (segment (start 113.21 100.03) (end 112.46 100.03) (width 0.1) (layer "F.Cu") (net 50) (tstamp 4010c6f0-6d45-4d5b-8c50-042bf8006327))
+  (segment (start 117.82 95.42) (end 113.21 100.03) (width 0.1) (layer "F.Cu") (net 50) (tstamp 8ab0fe00-405d-4089-b2b7-d76b9773171c))
+  (segment (start 117.82 92.45) (end 117.82 95.42) (width 0.1) (layer "F.Cu") (net 50) (tstamp fb2dd5dc-1be4-4b77-8f20-730cb7f45dba))
+  (segment (start 116.63 93.87) (end 112.67 97.83) (width 0.1) (layer "F.Cu") (net 51) (tstamp 6113bb2b-5997-4c7f-8ed8-fd41584390fd))
+  (segment (start 116.63 92.45) (end 116.63 93.87) (width 0.1) (layer "F.Cu") (net 51) (tstamp 64e8cbd8-e10b-4ed2-8788-b0bca859146b))
+  (segment (start 112.67 97.83) (end 112.46 97.83) (width 0.1) (layer "F.Cu") (net 51) (tstamp c2be5ec9-531f-4ae7-a6b4-0230ad101da1))
+
   (group "" (id 97973004-ab59-4480-8ec1-1121dd7cf977)
     (members
       00614f02-5f74-445d-b8a3-482b8dcb3aea

PCBs/FlipperZero/WiFi-Devboard-Pro/WiFi-Devboard-Pro.kicad_prl

@@ -2,8 +2,14 @@
   "board": {
     "active_layer": 0,
     "active_layer_preset": "",
-    "auto_track_width": false,
-    "hidden_nets": [],
+    "auto_track_width": true,
+    "hidden_nets": [
+      "GND",
+      "+5V",
+      "+LDO_3V3",
+      "+ext_3V3",
+      "+ext_5V"
+    ],
     "high_contrast_mode": 0,
     "net_color_mode": 1,
     "opacity": {
@@ -35,6 +41,7 @@
       5,
       9,
       10,
+      11,
       12,
       13,
       14,
@@ -59,7 +66,7 @@
       35,
       36
     ],
-    "visible_layers": "803d7ba_ffffffff",
+    "visible_layers": "80217ba_ffffffff",
     "zone_display_mode": 0
   },
   "meta": {

PCBs/FlipperZero/WiFi-Devboard-Pro/WiFi-Devboard-Pro.kicad_pro

@@ -48,7 +48,13 @@
           "min_clearance": 0.508
         }
       },
-      "diff_pair_dimensions": [],
+      "diff_pair_dimensions": [
+        {
+          "gap": 0.0,
+          "via_gap": 0.0,
+          "width": 0.0
+        }
+      ],
       "drc_exclusions": [],
       "meta": {
         "version": 2
@@ -112,8 +118,28 @@
         "solder_mask_min_width": 0.0,
         "use_height_for_length_calcs": true
       },
-      "track_widths": [],
-      "via_dimensions": [],
+      "track_widths": [
+        0.0,
+        0.1,
+        0.2,
+        0.3,
+        0.5,
+        1.0
+      ],
+      "via_dimensions": [
+        {
+          "diameter": 0.0,
+          "drill": 0.0
+        },
+        {
+          "diameter": 0.2,
+          "drill": 0.1
+        },
+        {
+          "diameter": 0.3,
+          "drill": 0.2
+        }
+      ],
       "zones_allow_external_fillets": false,
       "zones_use_no_outline": true
     },
@@ -350,9 +376,53 @@
         "name": "Default",
         "pcb_color": "rgba(0, 0, 0, 0.000)",
         "schematic_color": "rgba(0, 0, 0, 0.000)",
-        "track_width": 0.25,
-        "via_diameter": 0.8,
-        "via_drill": 0.4,
+        "track_width": 0.1,
+        "via_diameter": 0.3,
+        "via_drill": 0.2,
+        "wire_width": 6.0
+      },
+      {
+        "bus_width": 12.0,
+        "clearance": 0.2,
+        "diff_pair_gap": 0.25,
+        "diff_pair_via_gap": 0.25,
+        "diff_pair_width": 0.2,
+        "line_style": 0,
+        "microvia_diameter": 0.3,
+        "microvia_drill": 0.1,
+        "name": "GND",
+        "nets": [
+          "GND"
+        ],
+        "pcb_color": "rgba(0, 0, 0, 0.000)",
+        "schematic_color": "rgba(0, 0, 0, 0.000)",
+        "track_width": 0.2,
+        "via_diameter": 0.3,
+        "via_drill": 0.2,
+        "wire_width": 6.0
+      },
+      {
+        "bus_width": 12.0,
+        "clearance": 0.2,
+        "diff_pair_gap": 0.25,
+        "diff_pair_via_gap": 0.25,
+        "diff_pair_width": 0.2,
+        "line_style": 0,
+        "microvia_diameter": 0.3,
+        "microvia_drill": 0.1,
+        "name": "Supply",
+        "nets": [
+          "+3V3",
+          "+5V",
+          "+LDO_3V3",
+          "+ext_3V3",
+          "+ext_5V"
+        ],
+        "pcb_color": "rgba(0, 0, 0, 0.000)",
+        "schematic_color": "rgba(0, 0, 0, 0.000)",
+        "track_width": 0.2,
+        "via_diameter": 0.3,
+        "via_drill": 0.2,
         "wire_width": 6.0
       }
     ],